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參數(shù)資料
| 型號： | FMS6146MTC14 |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 3/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DRIVER VIDEO FLTR 6CH 14TSSOP |
| 標準包裝： | 94 |
| 類型： | 驅動器 |
| 應用： | 錄音機，機頂盒 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 14-TSSOP |
| 包裝： | 管件 |
| 其它名稱： | FMS6146MTC14_NL FMS6146MTC14_NL-ND |
ICS8545I
LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
IDT / ICS LVDS FANOUT BUFFER
11
ICS8545BGI REV. B MARCH 02, 2009
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8545I.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS8545I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VDD_MAX * IDD_MAX = 3.465V * 52mA = 180.18mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a moderate
air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.180W * 66.6°C/W = 97°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (single layer or multi-layer).
Table 6. Thermal Resitance θJA for 20 Lead TSSOP, Forced Convection
θ
JA by Velocity
Linear Feet per Minute
0200
500
Single-Layer PCB, JEDEC Standard Test Boards
114.5°C/W
98.0°C/W
88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
73.2°C/W
66.6°C/W
63.5°C/W
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