
2006 Fairchild Semiconductor Corporation
FMS6145 Rev. 2.0.4
www.fairchildsemi.com
8
F
fi
The same method can be used for biased signals, with the
addition of a pull-up resistor to make sure the clamp never
operates. The internal pull-down resistance is 800k
Ω
±20%, so the external resistance should be 7.5M
Ω
to set
the DC level to 500mV; as shown in Figure 12.
LCVF
Bias
Input
0.1μ
External video
source must
be AC coupled
500mV +/-350mV
75Ω
7.5MΩ
75Ω
Figure 12. Biased SCART with
DC-Coupled Outputs
The same circuits can be used with AC-coupled outputs if
desired.
DVD or
STB
SoC
DAC
Output
LCVF
Clamp
Active
0.1μ
0V - 1.4V
75Ω
220μ
Figure 13. DC-Coupled Inputs,
AC-Coupled Outputs
DVD or
STB
SoC
DAC
Output
75Ω
LCVF
Clamp
Active
0.1μ
0V - 1.4V
220μ
Figure 14. AC-Coupled Inputs and Outputs
Figure 15. Biased SCART with
AC-Coupled Outputs
Note:
The video tilt or line time distortion is dominated by
the AC-coupling capacitor. The value may need to be incre-
ased beyond 220
μ
F to obtain satisfactory operation in
some applications.
Power Dissipation
The FMS6145 output drive con
fi
guration must be considered
when calculating overall power dissipation. Care must be
taken not to exceed the maximum die junction temperature.
The following example can be used to calculate the
FMS6146’s power dissipation and internal temperature rise.
T
j
= T
A
+ P
d
q
JA
where: P
d
= P
CH1
+ P
CH2
+ P
CH3
and
P
CHx
= V
CC
I
CH
- (V
O
where: V
O
= 2V
IN
+ 0.280V
I
CH
= (I
CC
/3) + (V
O
/R
L
)
V
IN
= RMS value of input signal
I
CC
= 30mA
V
CC
= 5V
R
L
= channel load resistance
Board layout can also affect thermal characteristics. Refer
to the
Layout Considerations
section for details.
EQ. 1
EQ. 2
2
/R
L
)
EQ. 3
EQ. 4
EQ. 5
The FMS6145 is speci
fi
ed to operate with output currents
typically less than 50mA, more than suf
fi
cient for a dual
(75
Ω
) video load. Internal ampli
fi
ers are current limited to a
maximum of 100mA and should withstand brief-duration
short-circuit conditions; this capability is not guaranteed.
LCVF
Clamp
Active
0.1μ
External video
source must
be AC coupled
0V - 1.4V
220μ
75Ω
75Ω
Layout Considerations
General layout and supply bypassing play major roles in
high-frequency performance and thermal characteristics.
Fairchild offers a demonstration board, FMS6145DEMO,
to guide layout and aid device testing and characterizati-
on. The FMS6145DEMO is a four-layer board with full
power and ground planes. Following this layout con
fi
gu-
ration provides the optimum performance and thermal
characteristics. For optimum results, follow the guidelines
below as a basis for high-frequency layout:
nclude 1
μ
F and 0.1
μ
F ceramic bypass capacitors.
Place the 1
μ
F capacitor within 0.75 inches of the
power pin.
Place the 0.1
μ
F capacitor within 0.1 inches of the
power pin.
For multi-layer boards, use a large ground plane to help
dissipate heat.
For two-layer boards, use a ground plane that extends
beyond the device by at least 0.5 inches.
Minimize all trace lengths to reduce series inductances.
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