
FMS3818
PRODUCT SPECIFICATION
2
REV. 1.2.2 11/11/01
Functional Description
Within the FMS3818 are three identical 8-bit D/A
converters, each with a current source output. External loads
are required to convert these currents to voltage outputs.
Data inputs RGB
7-0
are overridden by the BLANK input.
SYNC = H activates sync current from I
green video signals.
OS
for sync-on-
Figure 1. FMS3818 Current Source Structure
Digital Inputs
Incoming GBR data is registered on the rising edge of the
clock input, CLK. Analog outputs follow the rising edge of
CLK after a delay, t
DO
.
SYNC and BLANK
SYNC and BLANK inputs control the output level (Figure 1
and Table 1) of the D/A converters during CRT retrace
intervals. BLANK forces the D/A outputs to the blanking
level while SYNC = L turns off a current source, I
connected to the green D/A converter. SYNC = H adds a
112/256 fraction of full-scale current to the green output.
SYNC = L extinguishes the sync current during the sync tip.
OS
that is
Figure 2. Nominal Output Levels
BLANK gates the D/A inputs. If BLANK = H, the D/A
inputs control the output currents to be added to the output
blanking level. If BLANK = L, data inputs and the pedestal
are disabled.
D/A Outputs
Each D/A output is a current source from the V
Expressed in current units, the GBR transformation from
data to current is as
follows:
DDA
supply.
G = G
B = B
R = R
7-0
7-0
7-0
& BLANK + SYNC * 112
& BLANK
& BLANK
Typical LSB current step is 73.2 μA.
To obtain a voltage output, a resistor must be connected to
ground. Output voltage depends upon this external resistor,
the reference voltage, and the value of the gain-setting resis-
tor connected between R
REF
and GND.
To implement a doubly-terminated 75
shunt 75
resistor should be placed adjacent to the analog
output pin. With a terminated 75
analog output, the load on the FMS3818 current source is
37.5
.
transmission line, a
line connected to the
The FMS3818 may also be operated with a single 75 Ohm
terminating resistor. To lower the output voltage swing to the
desired range, the nominal value of the R
be doubled.
REF
resistor should
Voltage Reference
Full scale current is a multiple of the current I
external resistor, R
SET
GND. Voltage across R
which can be derived from either the 1.25 volt internal
bandgap reference or an external voltage reference
connected to V
REF
. To minimize noise, a 0.1μF capacitor
should be connected between V
SET
through an
REF
pin and
REF
connected between the R
SET
is the reference voltage, V
,
REF
and ground.
I
To minimize noise, a 0.1μF capacitor should be connected
between the COMP pin and the analog supply voltage V
SET
is mirrored to each of the GBR output current sources.
DDA
.
Power and Ground
Required power is a single +3.3 Volt supply. To minimize
power supply induced noise, analog +3.3V should be
connected to V
DDD
and V
DDA
decoupling capacitors placed adjacent to each V
pin pair.
pins with 0.1 and 0.01 μF
DD
pin or
High slew-rate digital data makes capacitive coupling to the
outputs of any D/A converter a potential problem. Since the
digital signals contain high-frequency components of the
CLK signal, as well as the video output signal, the resulting
data feedthrough often looks like harmonic distortion or
reduced signal-to-noise performance. All ground pins should
be connected to a common solid ground plane for best
performance.
V
DDA
SYNC
V
DDA
V
DDA
G
7-0
B
7-0
V
DDA
R
7-0
I
OS
data: 700 mV max.
sync: 307 mV