
FM8P54/56
Rev1.21 May 31, 2005
P.25/FM8P54/56
FEELING
TECHNOLOGY
3.0 INSTRUCTION SET
Mnemonic,
Operands
BCR
BSR
BTRSC
BTRSS
NOP
Description
Operation
Cycles
Status
Affected
-
R, bit
Clear bit in R
R, bit
Set bit in R
R, bit
Test bit in R, Skip if Clear
R, bit
Test bit in R, Skip if Set
No Operation
0
R<b>
1
1
R<b>
1
-
Skip if R<b> = 0
1/2
(1)
1/2
(1)
-
Skip if R<b> = 1
-
No operation
00h
WDT,
00h
WDT prescaler
ACC
OPTION
00h
WDT,
00h
WDT prescaler
PC + 1
Top of Stack,
002h
PC
1
-
PD
TO
CLRWDT
1
Clear Watchdog Timer
,
OPTION
Load OPTION register
1
-
PD
TO
SLEEP
1
Go into power-down mode
,
INT
3
-
S/W interrupt
Adjust ACC’s data format from
HEX to DEC after any addition
operation
Adjust ACC’s data format from
HEX to DEC after any subtraction
operation
Return from subroutine
DAA
ACC(hex)
ACC(dec)
1
C
DAS
ACC(hex)
ACC(dec)
1
-
RETURN
Top of Stack
PC
Top of Stack
PC,
1
GIE
00h
ACC
2
-
RETFIE
2
-
Return from interrupt, set GIE bit
CLRA
IOST
CLRR
MOVAR
MOVR
DECR
R
R
R
R, d
Move R
R, d
Decrement R
Clear ACC
1
Z
Load IOST register
ACC
IOST register
1
-
Clear R
00h
R
1
Z
Move ACC to R
ACC
R
1
-
R
dest
1
Z
R - 1
dest
R - 1
dest,
Skip if result = 0
R + 1
dest
R + 1
dest,
Skip if result = 0
R + ACC
dest
1
Z
(1)
DECRSZ R, d
1/2
Decrement R, Skip if 0
-
INCR
R, d
Increment R
1
Z
(1)
INCRSZ
R, d
1/2
Increment R, Skip if 0
-
ADDAR
SUBAR
ADCAR
SBCAR
ANDAR
IORAR
XORAR
COMR
R, d
Add ACC and R
R, d
Subtract ACC from R
R, d
Add ACC and R with Carry
R, d
Subtract ACC from R with Carry
R, d
AND ACC with R
R, d
Inclusive OR ACC with R
R, d
Exclusive OR ACC with R
R, d
Complement R
1
C, DC, Z
R - ACC
dest
1
C, DC, Z
R + ACC + C
dest
1
C, DC, Z
ACC
R +
+ C
dest
1
C, DC, Z
ACC and R
dest
1
Z
ACC or R
dest
1
Z
R xor ACC
dest
1
Z
dest
R<7>
C,
R<6:0>
dest<7:1>,
C
dest<0>
1
Z
R
RLR
R, d
Rotate left f through Carry
1
C