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參數(shù)資料
| 型號： | FM3580MT20 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2mm TERMINAL STRIP |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 107K |
| 代理商： | FM3580MT20 |
9
F
www.fairchildsemi.com
FM3580 Rev. A.5
SOPR-A/B Register Diagram
MXSB MXSA
I4
I3
I2
I1
I0
BIT 7
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
NMO
5-Bit data for Y-Port
Non_Mux_Out bit
Multiplexer select bits:
00 - Multiplexer passes SOPR-A
01 - Multiplexer passes SOPR-B
10 - Multiplexer passes I-Port (Powerup default)
PIPR Register Diagram
0
0
0
I3
I2
I1
I0
BIT 7
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
I4
5-Bit latched I-Port data.
Reserved. Set to read 0-0-0 always.
Write VID Registers Diagram
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
W
R
I
T
E
DATA
BYTE
DEVICE
ADDRESS
1 0 0 1 1 1 0 0
A A
A A
0 0 -- SOPR-A Register
0 1 -- SOPR-B Register
(ASEL = 1)
Read VID Registers Diagram
A
C
K
A
C
K
BYTE
COUNT
S
T
A
R
T
R
E
A
D
DEVICE
ADDRESS
1 0 0 1 1 1 0 1
0 0 0 0 0 0 1 1
SOPR-A
READ DATA
A
C
K
A
C
K
SOPR-B
READ DATA
PIPR
READ DATA
N
O
A
C
K
S
T
O
P
(ASEL = 1)
Note:
-Bit 7 and Bit 6 are common to both the SOPR-A and SOPR-B registers.
-Bit 7 and Bit 6 are volatile bits.
-Bits [5:0] are non-volatile bits.
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