參數(shù)資料
型號: FM34W02U
廠商: Fairchild Semiconductor Corporation
元件分類: DRAM
英文描述: 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect(帶滿陣列寫保護的2K位的兩線控制總線接口串行EEPROM)
中文描述: 的2K位標(biāo)準2線總線接口的串行EEPROM與全陣列寫保護(帶滿陣列寫保護的2K位的兩線控制總線接口串行EEPROM的)
文件頁數(shù): 7/12頁
文件大?。?/td> 78K
代理商: FM34W02U
7
www.fairchildsemi.com
FM34W02U
F
w
Device Addressing
Following a start condition the master must output the address of
the slave it is accessing. The most significant four bits of the slave
address are those of the device type identifier (see Figure 4) This
is fixed as 1010 for all EEPROM devices.
Write Cycle Timing
SDA
SCL
STOP
CONDITION
START
CONDITION
WORD n
8th BIT
ACK
tWR
SDA
SCL
START
CONDITION
STOP
CONDITION
SCL
DATA STABLE
DATA
CHANGE
SDA
SCL FROM
MASTER
DATA OUTPUT
FROM
TRANSMITTER
DATA OUTPUT
FROM
RECEIVER
1
8
9
START
ACKNOWLEDGE
Data Validity (Figure 1).
Start and Stop Definition (Figure 2).
All IIC EEPROMs use an internal protocol that defines a PAGE
BLOCK size of 2K bits (for Byte addresses 00 through FF).
Acknowledge Responses from Receiver (Figure 3).
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