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參數(shù)資料
| 型號(hào)： | FM3216-S |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Integrated Processor Companion with Memory |
| 中文描述： | 綜合處理器與記憶體伴侶 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 285K |
| 代理商： | FM3216-S |
FM3204/16/64/256
Rev 2.1
Dec. 2004
Page 6 of 20
Figure 5. Comparator as Early Power-Fail Warning
The comparator is a general purpose device and its
application is not limited to the NMI function.
Note: The maximum voltage on the comparator input PFI
is limited to 3.75V under normal operating conditions.
Event Counter
The FM32xx offers the user two battery-backed event
counters. Input pins CNT1 and CNT2 are
programmable edge detectors. Each clocks a 16-bit
counter. When an edge occurs, the counters will
increment their respective registers. Counter 1 is
located in registers 0Dh and 0Eh, Counter 2 is
located in registers 0Fh and 10h. These register
values can be read anytime V
DD
is above V
TP
, and
they will be incremented as long as a valid VBAK
power source is provided. To read, set the RC bit
register 0Ch bit 3 to 1. This takes a snapshot of all
four counter bytes allowing a stable value even if a
count occurs during the read. The registers can be
written by software allowing the counters to be
cleared or initialized by the system. Counts are
blocked during a write operation. The two counters
can be cascaded to create a single 32-bit counter by
setting the CC control bit (register 0Ch). When
cascaded, the CNT1 input will cause the counter to
increment. CNT2 is not used in this mode.
The control bits for event counting are located in
register 0Ch. Counter 1 Polarity is bit C1P, bit 0;
Counter 2 Polarity is C2P, bit 1; the Cascade Control
is CC, bit 2; and the Read Counter bit is RC bit 3.
C1P
Figure 6. Event Counter
The polarity bits must be set prior to setting the
counter value(s). If a polarity bit is changed, the
counter may inadvertently increment.
Serial Number
A memory location to write a 64-bit serial number is
provided. It is a writeable nonvolatile memory block
that can be locked by the user once the serial number
is set. The 8 bytes of data and the lock bit are all
accessed via the device ID for the processor
companion. Therefore the serial number area is
separate and distinct from the memory array. The
serial number registers can be written an unlimited
number of times, so these locations are general
purpose memory.
However once the lock bit is set the
values cannot be altered and the lock cannot be
removed.
Once locked the serial number registers can
still be read by the system.
The serial number is located in registers 11h to 18h.
The lock bit is SNL, register 0Bh bit 7. Setting the
SNL bit to a 1 disables writes to the serial number
registers, and
the SNL bit cannot be cleared
.
Backup Power
The event counter and battery-backed registers may
be powered with a backup power source. When the
primary system power fails, the voltage on the V
DD
pin will drop. When V
DD
is less than 2.5V, the event
counters and battery-backed registers will switch to
the backup power supply on V
BAK
.
When a battery is used as a backup source, V
DD
must
be applied prior to inserting the battery to prevent
battery drain. Once V
DD
is applied and a battery is
inserted, the current drain on the battery is
guaranteed to be less than I
BAK
(max).
Trickle Charger
To facilitate capacitor backup the V
BAK
pin can
optionally provide a trickle charge current. When the
VBC bit, register 0Bh bit 2, is set to 1 the V
BAK
pin
will source approximately 15 μA until V
BAK
reaches
V
DD
or 3.75V whichever is less. In 3V systems, this
charges the capacitor to V
DD
without an external
diode and resistor charger. In 5V systems, it provides
the same convenience and also prevents the user from
exceeding the V
BAK
maximum voltage specification.
In the case where no battery is used, the V
BAK
pin
should be tied according to the following conditions:
For 3.3V systems, V
BAK
should be tied to V
DD
.
This assumes V
DD
does not exceed 3.75V.
For 5V systems, attach a 1 μF capacitor to V
BAK
and turn the trickle charger on. The V
BAK
pin
will charge to the internal backup voltage which
regulates itself to about 3.6V. V
BAK
should not
+
-
1.2V ref
Regulator
VDD
FM32xx
To MCU
NMI input
CAL/PFO
PFI
16-bit Counter
CNT1
CC
CNT2
C2P
16-bit Counter
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| FM3216-STR | 功能描述:監(jiān)控電路 16K w/Pwr Mon WDT Bat Sw Pwr Fail RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| FM3222-0 | 制造商:Power-One 功能描述:DC/DC,SNGL-OUT - Bulk |
| FM32256 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Integrated Processor Companion with Memory |
| FM32256-G | 功能描述:監(jiān)控電路 256K w/Pwr Mon WDT Bat Sw Pwr Fail RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| FM32256-GTR | 功能描述:監(jiān)控電路 256K w/Pwr Mon WDT Bat Sw Pwr Fail RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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