參數(shù)資料
型號: FM27C256NE120
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 262,144-Bit (32K x 8) High Performance CMOS EPROM
中文描述: 32K X 8 OTPROM, 120 ns, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 2/10頁
文件大?。?/td> 103K
代理商: FM27C256NE120
2
www.fairchildsemi.com
F
FM27C256
Connection Diagrams
Commercial Temp. Range (0
°
C to +70
°
C)
V
CC
= 5V
±
10%
Parameter/Order Number
Access Time (ns)
FM27C256 Q, N, V 90
90
FM27C256 Q, N, V 120
120
FM27C256 Q, N, V 150
150
Extended Temp. Range (-40
°
C to +85
°
C)
V
CC
= 5V
±
10%
Parameter/Order Number
Access Time (ns)
FM27C256 QE, NE, VE 120
120
FM27C256 QE, NE, VE 150
150
Note:
Surface mount PLCC package available for commercial and extended
temperature ranges only.
Package Types: FM27C256 Q, N, V XXX
Q = Quartz-Windowed Ceramic DIP
N = Plastic OTP DIP
V = Surface-Mount PLCC
All Packages conform to the JEDEC standard.
All versions are guaranteed to function for slower speeds.
Pin Names
Symbol
Description
A0
A14
Addresses
CE/PGM
Chip Enable/Program
OE
Output Enable
O0
O7
Outputs
XX
Don
t Care (during Read)
PLCC
Note:
Compatible EPROM pin configurations are shown in the blocks adjacent to the FM27C256 pins.
A
8
A
9
A
11
XX
OE
A
10
CE/PGM
O
7
O
6
A
6
A
5
A
4
A
3
A
2
A
1
A
0
XX
O
0
A
7
A
1
V
P
X
V
C
A
1
A
1
O
1
O
2
G
X
O
3
O
4
O
5
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
14 15 16 17 18 19 20
4 3 2 1 32 31 30
DS800034-2
DS800034-3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
PP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
27C040
XX/VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
27C040
VCC
A18
A17
A14
A13
A8
A9
A11
OE
A10
CE/PGM
O7
O6
O5
O4
O3
DlP
FM27C256
V
CC
A14
A13
A8
A9
A11
OE
A10
CE/PGM
O7
O6
O5
O4
O3
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
27C512
27C512
XX/VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
27C010
27C010
VCC
XX/PGM
XX
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE/PGM
O7
O6
O5
O4
O3
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