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參數(shù)資料
| 型號： | FM27C010 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | CONN; 40 PIN, 2 X 20, GOLD, .1"LS, TLW, STRAIGHT |
| 中文描述： | 1,048,576 - 128K的× 8位高性能CMOS存儲器 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 109K |
| 代理商： | FM27C010 |
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www.fairchildsemi.com
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FM27C010
FM27C010
1,048,576-Bit (128K x 8) High Performance
CMOS EPROM
General Description
The FM27C010 is a high performance, 1,048,576-bit Electrically
Programmable UV Erasable Read Only Memory. It is organized
as 128K-words of 8 bits each. Its pin-compatibility with byte-wide
JEDEC EPROMs enables upgrades through 8 Mbit EPROMs.
The “Don’t Care” feature during read operations allows memory
expansions from 1M to 8M bits with no printed circuit board
changes.
The FM27C010 can directly replace lower density 28-pin EPROMs
by adding an A16 address line and V
CC
jumper. During the normal
read operation PGM and V
PP
are in a “Don’t Care” state which
allows higher order addresses, such as A17, A18, and A19 to be
connected without affecting the normal read operation. This
allows memory upgrades to 8M bits without hardware changes.
The FM27C010 is also offered in a 32-pin plastic DIP with the
same upgrade path.
The FM27C010 provides microprocessor-based systems exten-
sive storage capacity for large portions of operating system and
application software. Its 70 ns access time provides no-wait-state
operation with high-performance CPUs. The FM27C010 offers a
single chip solution for the code storage requirements of 100%
firmware-based equipment. Frequently-used software routines
system utility.
Block Diagram
January 2000
The FM27C010 is manufactured using Fairchild’s advanced CMOS
AMG EPROM technology.
The FM27C010 is one member of a high density EPROM Family
which range in densities up to 4 Megabit.
Features
I
High performance CMOS
—70 ns access time
I
Fast turn-off for microprocessor compatibility
I
Simplified upgrade path
—V
PP
and PGM are “Don’t Care” during normal read
operation
I
Manufacturers identification code
I
Fast programming
I
JEDEC standard pin configurations
—32-pin PDIP package
—32-pin PLCC package
—32-pin CERDIP package
DS800032-1
2000 Fairchild Semiconductor Corporation
Output Enable,
Chip Enable, and
Program Logic
Y Decoder
X Decoder
.
.
Output
Buffers
1,048,576-Bit
Cell Matrix
Data Outputs O
0
- O
7
V
CC
GND
V
PP
OE
PGM
CE
A
0
- A
16
Address
Inputs
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FM27C010N120 | CONN HEADER .100 72POS DL GOLD |
| FM27C010N150 | CONN HEADER .100 72POS DUAL TIN |
| FM27C010NE120 | SOCKET TERMINAL, STRIP, 36-POS 2-ROW, 0.135 |
| FM27C010NE150 | CONN HEADER .100 72POS DL GOLD |
| FM27C010NE90 | CONN HEADER .100 72POS DUAL TIN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FM27C010N120 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:1,048,576-Bit 128K x 8 High Performance CMOS EPROM |
| FM27C010N150 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:1,048,576-Bit 128K x 8 High Performance CMOS EPROM |
| FM27C010N45L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| FM27C010N55L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| FM27C010N90 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:1,048,576-Bit 128K x 8 High Performance CMOS EPROM |
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