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參數(shù)資料
| 型號(hào)： | FM2400RTIM8B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Module receptor 2400 |
| 中文描述： | 2400模塊受體 |
| 文件頁(yè)數(shù)： | 4/5頁(yè) |
| 文件大?。?/td> | 91K |
| 代理商： | FM2400RTIM8B |
COMTECH TECHNOLOGY CO., LTD.
FM2400RTIM8B
Oct. 3, 2000
4
Address 1 1 0 0 0 MA1 MA0 0 A BYTE 1
Programmable Divider 0 2
14
2
13
2
12
2
11
2
10
2
9
2
8
A BYTE 2
Programmable Divider 2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
A BYTE 3
Charge Pump and 1 CP T1 T0 1 1 1 OS A BYTE 4
Test Bits
I/O Port Control Bits P7 P6 P5 P4 P3 P2 P1 P0 A BYTE 5
7-1 Signal Level Out Voltage
7-2 IIC Bus
1) SDA, SCL Input Voltage
2) Address
3) SDA, SCL
Input Impedance
4) Date Format
under standard test condition
Condition Min. Typ. Max. Note
High Voltage 3 5 V
Low Voltage 0 1.5 V
C2 (on write data format)
SDA/SCL are in the high impedance and there should be no reliablity
problem with 5V continually on the SDA/SCL if power supply is switched
off.
MSB LSB
table 2 read data format
A: acknowledge bit
MA1, MA0: voltage address bits
CP: charge pomp current select
T1: test mode selection
T0: charge pump disable
OS: varactor drive output disable switch
P7, P6, P5, P4, P3, P2, P1, P0: control output states
POR: power on reset indicator
I2, I1, I0: digital information from ports P7, P5 and P4
A2, A1, A0: 5 level ADC data from P6
table 1 write data format (MSB is transmitted first)
Address 1 1 0 0 0 MA1 MA0 1 A BYTE1
Status Byte FOR FL I2 I1 I0 A2 A1 A0 A BYTE 2
4
3
2
1
-30 -45 -60 -80 input level(dBm)
(V)
Signal Level Out
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