參數(shù)資料
型號(hào)： FM1246
廠商： NXP Semiconductors N.V.
英文描述： CABLE ASSEM 2MM 40POS F-F 12,1
中文描述： 桌面視頻
文件頁(yè)數(shù)： 15/24頁(yè)
文件大?。?/td> 177K
代理商： FM1246
1997 May 14
15
Philips Components
Preliminary specification
Desktop video & FM radio module
system CCIR I
FM1246
T
ELEGRAM EXAMPLES
(WRITE
MODE
)
Start - Adb - Ack - Db1 - Ack - Db2 - Ack - Cb - Ack - Pb - Ack - Stop.
Start - Adb - Ack - Cb - Ack - Pb - Ack - Db1 - Ack - Db2 - Ack - Stop.
Start - Adb - Ack - Db1 - Ack - Db2 - Ack - Cb - Ack - Stop.
Start - Adb - Ack - Db1 - Ack - Db2 - Ack - Stop.
Where:
Start = start condition
Adb = address byte
Ack = acknowledge
Db1 = divider byte 1
Db2 = divider byte 2
Cb = control byte
Pb = ports byte
Stop = stop condition.
READ mode
The in-lock can be read by setting the R/W bit to 1.
Notes
1.
POR = Power On Reset. POR is internally set to 1 in case V
S
drops below 3 V. The POR bit is reset when an end of
data is detected by the PLL IC.
FL = In-lock flag; FL = 1: loop is phase-locked. The loop must be phase-locked during at least 8 periods of the internal
reference frequency (either 7.8125 kHz, 3.90625 kHz or 6.25 kHz) before the FL flag is internally set to 1.
I2, I1 and I0 = digital information for I/O ports P2, P1 and P0 respectively.
A2, A1 and A0 = built-in 5-level A/D converter on the internal I/O port P6 (see Table “Digital AFC status”).
A = Acknowledge.
2.
3.
4.
5.
T
ELEGRAM EXAMPLES
(READ
MODE
)
Start - Adb - Ack - STB - Ack - STB - - Stop (no Ack from processor = End-of-data).
Start - Adb - Ack - STB - - Stop (no Ack from processor = End-of-data).
Where:
STB = Status byte.
BYTE
BITS
7
MSB
6
5
4
3
2
1
0
LSB
A
(5)
Address byte
Status byte
1
1
0
0
0
MA1
A2
(4)
MA0
A1
(4)
1
A
A
POR
(1)
FL
(2)
I2
(3)
I1
(3)
I0
(3)
A0
(4)
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