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參數(shù)資料
| 型號(hào)： | FIN210ACMLX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 15/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SER/DES 10BIT 32-MLP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 功能： | 串行器/解串器 |
| 輸入類型： | LVCMOS |
| 輸出類型： | 串行 |
| 輸入數(shù)： | 10 |
| 輸出數(shù)： | 1 |
| 電源電壓： | 1.65 V ~ 3.6 V |
| 工作溫度： | -30°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-MLP（5x5） |
| 包裝： | 帶卷 (TR) |
SC16IS741_1
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
7 of 52
NXP Semiconductors
SC16IS741
Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
7.2.1 Auto RTS
Figure 5 shows RTS functional timing. The receiver FIFO trigger levels used in auto RTS
are stored in the TCR or FCR. RTS is active if the RX FIFO level is below the halt trigger
level in TCR[3:0]. When the receiver FIFO halt trigger level is reached, RTS is deasserted.
The sending device (for example, another UART) may send an additional character after
the trigger level is reached (assuming the sending UART has another character to send)
because it may not recognize the deassertion of RTS until it has begun sending the
additional character. RTS is automatically reasserted once the receiver FIFO reaches the
resume trigger level programmed via TCR[7:4]. This re-assertion allows the sending
device to resume transmission.
7.2.2 Auto CTS
Figure 6 shows CTS functional timing. The transmitter circuitry checks CTS before
sending the next data byte. When CTS is active, the transmitter sends the next byte. To
stop the transmitter from sending the following byte, CTS must be deasserted before the
middle of the last stop bit that is currently being sent. The auto CTS function reduces
interrupts to the host system. When flow control is enabled, CTS level changes do not
trigger host interrupts because the device automatically controls its own transmitter.
Without auto CTS, the transmitter sends any data present in the transmit FIFO and a
receiver overrun error may result.
(1) N = receiver FIFO trigger level.
(2) The two blocks in dashed lines cover the case where an additional character is sent, as described in Section 7.2.1
Fig 5.
RTS functional timing
start
character
N
start
character
N + 1
start
stop
RX
RTS
receive
FIFO
read
N
N + 1
12
002aab040
(1) When CTS is LOW, the transmitter keeps sending serial data out.
(2) When CTS goes HIGH before the middle of the last stop bit of the current character, the transmitter finishes sending the current
character, but it does not send the next character.
(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.
Fig 6.
CTS functional timing
start
bit 0 to bit 7
stop
TX
CTS
002aab041
start
stop
bit 0 to bit 7
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| FIN212ACBFX | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| FIN212ACGFX | 功能描述:LVDS 接口集成電路 12-Bit Serializer Deserializer RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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