DC Electrical Characteristics (Continued) Note 2: All" />
參數(shù)資料
型號: FIN1019M
廠商: Fairchild Semiconductor
文件頁數(shù): 8/14頁
文件大小: 0K
描述: IC DRVR/RCVR 3.3V HS LVDS 14SOIC
產(chǎn)品變化通告: Product Discontinuation 14/Mar/2011
標準包裝: 55
類型: 線路收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: LVDS
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 管件
其它名稱: FIN1019M_NL
FIN1019M_NL-ND
3
www.fairchildsemi.com
FI
N1019
DC Electrical Characteristics (Continued)
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typical values are at TA = 25°C and with VCC = 5V.
Note 4: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Device Characteristics
ICC
Power Supply Current
Driver Enabled, Driver Load: RL = 100
12.5
mA
Receiver Disabled, No Receiver Load
Driver Enabled, Driver Load: RL = 100 ,
12.5
mA
Receiver Enabled, (RIN+ = 1V and RIN = 1.4V)
or (RIN+ = 1.4V and ROUT = 1V)
Driver Disabled, Receiver Enabled,
7.0
mA
(RIN+ = 1V and RIN = 1.4V) or
(RIN+ = 1.4V and RIN = 1V)
Driver Disabled, Receiver Disabled
7.0
mA
CIN
Input Capacitance
Any LVTTL or LVDS Input
4
pF
COUT
Output Capacitance
Any LVTTL or LVDS Output
6
pF
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
Driver Timing Characteristics
tPLHD
Differential Propagation Delay
0.5
1.5
ns
LOW-to-HIGH
tPHLD
Differential Propagation Delay
0.5
1.5
ns
HIGH-to-LOW
RL = 100 , CL = 10 pF,
tTLHD
Differential Output Rise Time (20% to 80%)
See Figure 2 and Figure 3
0.4
1.0
ns
tTHLD
Differential Output Fall Time (80% to 20%)
0.4
1.0
ns
tSK(P)
Pulse Skew |tPLH - tPHL|
0.5
ns
tSK(PP)
Part-to-Part Skew (Note 4)
1.0
ns
tZHD
Differential Output Enable Time from Z to HIGH RL = 100, CL = 10 pF,
5.0
ns
tZLD
Differential Output Enable Time from Z to LOW
See Figure 4 and Figure 5
5.0
ns
tHZD
Differential Output Disable Time from HIGH to Z
5.0
ns
tLZD
Differential Output Disable Time from LOW to Z
5.0
ns
Receiver Timing Characteristics
tPLH
Propagation Delay LOW-to-HIGH
0.9
2.5
ns
tPHL
Propagation Delay HIGH-to-LOW
0.9
2.5
ns
tTLH
Output Rise time (20% to 80%)
|VID| = 400 mV, CL = 10 pF,
0.5
ns
tTHL
Output Fall time (80% to 20%)
See Figure 6 and Figure 7
0.5
ns
tSK(P)
Pulse Skew | tPLH - tPHL |
0.5
ns
tSK(PP)
Part-to-Part Skew (Note 4)
1.0
ns
tZH
LVTTL Output Enable Time from Z to HIGH
5.0
ns
tZL
LVTTL Output Enable Time from Z to LOW
RL = 500 , CL = 10 pF,
5.0
ns
tHZ
LVTTL Output Disable Time from HIGH to Z
See Figure 8
5.0
ns
tLZ
LVTTL Output Disable Time from LOW to Z
5.0
ns
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