參數(shù)資料
型號： FEB-F4065
廠商： SIEMENS AG
英文描述： High Voltage Subscriber Line IC HV-SLIC
中文描述： 高壓用戶線芯片的HV -用戶接口
文件頁數(shù)： 19/29頁
文件大小： 237K
代理商： FEB-F4065
PEB/F 4065
Electrical Characteristics
Semiconductor Group
19
1998-03-01
68.
Power supply
rejection ratio
V
BAT
/
V
ab
PSRR
CONV,
BB
PD
33
30/28
40
–
–
–
dB
dB
4
300 Hz <
f
< 3.4 kHz
V
Supply,AC
= 100 mVp
I
ab
= 30 mA
69.
V
H
/
V
ab
70.
V
DD
/
V
ab
BB
33/30
40
–
dB
CONV,
BB
33
50
–
dB
71.
V
SS
/
V
ab
CONV,
BB
33
50
25
–
dB
dB
72. Ringing
voltage
V
RING
RING
67
–
–
Vrms,
diff
8
R
L
= 1 k
C
L
= 1
μ
F
f
= 66 Hz
V
2W
= 1.7 Vrms
V
H
= 80 V
f
= 20 Hz
V
2W
= 2.2 Vrms
f
= 66 Hz
V
2W
= 1.7 Vrms
73. Ringing
voltage with
extended
V
H
74. Ringing
distortion
84
–
–
Vrms,
diff
8
THD
RING
–
–
4
%
8
Transversal Current Output
I
T
Transversal
current ratio
75.
Git
CONV,
BB
33.89
33.98
34.07
dB
4
V
2W
= 50 mVrms
f
= 1015 Hz
I
ab
= 20 mA
76.
CONV 33.89
33.98
34.07
dB
I
ab
= 50 mA
300 Hz <
f
< 3400 Hz
V
2W,AC
= 50 mVrms
I
ab
= 20 mA
3 dBm0 >
V
ab
>
– 20 dBm0
f
= 1015 Hz
77. Gain flatness
(guaranteed
by design)
dGit
CONV,
BB
– 0.05 –
0.05
dB
–
78. Gain tracking
(guaranteed
by design)
dGit
CONV – 0.2
–
0.2
dB
–
79. Total
harmonic
distortion
V
IT
THD,
I
T
CONV –
0.01
0.3
%
4
V
2W,AC
= 50 mVrms
f
= 1015 Hz
I
ab
= 15 mA
Table 8
(cont’d)
No. Parameter
Symbol Mode
Limit Values
Unit
Test
Fig.
Test Condition
min.
typ.
max.
PEB/
PEF
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