參數(shù)資料
型號(hào): FDS4895C
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Dual N & P-Channel PowerTrench MOSFET
中文描述: 5.5 A, 40 V, 0.039 ohm, 2 CHANNEL, N AND P-CHANNEL, Si, POWER, MOSFET
封裝: SO-8
文件頁(yè)數(shù): 3/8頁(yè)
文件大?。?/td> 162K
代理商: FDS4895C
FDS4895C Rev C(W)
Electrical Characteristics
(continued)
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type Min
Typ
Max Units
Switching Characteristics
(Note 2)
t
d(on)
Turn-On Delay Time
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
9
12
4
15
18
45
3
18
7
20
2.4
3
2
4
18
22
8
27
32
72
6
32
10
28
ns
t
r
Turn-On Rise Time
ns
t
d(off)
Turn-Off Delay Time
ns
t
f
Turn-Off Fall Time
Q1
V
DD
= 20 V, I
D
= 1 A,
V
GS
= 10V,
R
GEN
= 6
Q2
V
DD
= –20 V, I
D
= –1 A,
V
GS
= –10V, R
GEN
= 6
ns
Q
g
Total Gate Charge
nC
Q
gs
Gate-Source Charge
nC
Q
gd
Gate-Drain Charge
Q1
V
DS
= 20 V, I
D
= 5.5 A, V
GS
= 10 V
Q2
V
DS
= –20 V, I
D
= –4.4 A,V
GS
=–10 V
nC
Drain–Source Diode Characteristics
V
SD
Drain-Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery
Time
Q
rr
Diode Reverse Recovery
Charge
V
GS
= 0 V, I
S
= 1.3 A
V
GS
= 0 V, I
S
= –1.3 A
Q1
I
= 5.5 A, d
iF
/d
t
= 100 A/μs
Q2
I
F
= –4.4 A, d
iF
/d
t
= 100 A/μs
(Note 2)
(Note 2)
Q1
Q2
Q1
Q2
Q1
Q2
0.7
–0.7
21
24
12
12
1.2
–1.2
V
nS
nC
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a) 78°/W when
mounted on a
0.5 in
2
pad of 2 oz
copper
b) 125°/W when
mounted on a .02 in
2
pad of 2 oz copper
c) 135°/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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