參數(shù)資料
型號(hào): FDG6302P
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號(hào)晶體管
英文描述: Dual P-Channel, Digital FET
中文描述: 140 mA, 25 V, 2 CHANNEL, P-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SC-70, 6 PIN
文件頁(yè)數(shù): 2/8頁(yè)
文件大小: 302K
代理商: FDG6302P
Electrical Characteristics
(T
A
= 25
O
C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
BV
DSS
/
T
J
I
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= -250 μA
I
D
= -250 μA, Referenced to 25
o
C
-25
V
Breakdown Voltage Temp. Coefficient
-19
mV /
o
C
Zero Gate Voltage Drain Current
V
DS
= -20 V, V
GS
= 0 V
-1
μA
T
J
= 55°C
-10
μA
I
GSS
ON CHARACTERISTICS
(Note 2)
Gate - Body Leakage Current
V
GS
= -8 V, V
DS
= 0 V
-100
nA
V
GS(th)
V
GS(th)
/
T
J
R
DS(ON)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= -250 μA
I
D
= -250 μA, Referenced to 25
o
C
-0.65
-0.9
-1.5
V
Gate Threshold Voltage Temp.Coefficient
2
mV /
o
C
Static Drain-Source On-Resistance
V
GS
= -4.5 V, I
D
= -0.14 A
7.3
10
T
J
=125°C
11
17
V
GS
= -2.7 V, I
D
= -0.05 A
V
GS
= -4.5 V, V
DS
= -5 V
V
DS
= -5 V, I
D
= -0.14 A
10.4
13
I
D(ON)
g
FS
DYNAMIC CHARACTERISTICS
On-State Drain Current
-0.14
A
Forward Transconductance
0.12
S
C
iss
C
oss
C
rss
SWITCHING CHARACTERISTICS
(Note 2)
Input Capacitance
V
= -10 V, V
GS
= 0 V,
f = 1.0 MHz
12
pF
Output Capacitance
7
pF
Reverse Transfer Capacitance
1.5
pF
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Turn - On Delay Time
V
DD
= -5 V, I
D
= -0.25 A,
V
GS
= -4.5 V, R
GEN
= 6
5
12
ns
Turn - On Rise Time
8
16
ns
Turn - Off Delay Time
9
18
ns
Turn - Off Fall Time
5
10
ns
Total Gate Charge
V
DS
= -5 V, I
D
= -0.14 A,
V
GS
= -4.5 V
0.22
0.31
nC
Gate-Source Charge
0.12
nC
Gate-Drain Charge
0.05
nC
I
S
V
SD
Maximum Continuous Source Current
-0.25
A
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -0.25 A
(Note 2)
-0.8
-1.2
V
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed
by design while R
CA
is determined by the user's board design. R
θ
JA
= 415
O
C/W on minimum pad mounting on FR-4 board in still air.
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
FDG6302P Rev.F1
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