參數(shù)資料
型號(hào): FDC796N
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: 30V N-Channel PowerTrench MOSFET
中文描述: 12.5 A, 30 V, 0.009 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝: FLMP, SUPERSOT-6
文件頁(yè)數(shù): 2/6頁(yè)
文件大?。?/td> 185K
代理商: FDC796N
FDC796N Rev D (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSS
Gate–Body Leakage
V
GS
= 0 V,
I
D
= 250
μ
A, Referenced to 25
°
C
V
DS
= 24 V,
V
GS
= 0 V
V
GS
=
±
20 V, V
DS
= 0 V
I
D
= 250
μ
A
30
V
Breakdown Voltage Temperature
25
mV/
°
C
μ
A
nA
10
±
100
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
(Note 2)
V
DS
= V
GS
,
I
D
= 250
μ
A, Referenced to 25
°
C
V
GS
= 10 V,
I
D
= 12.5 A
V
GS
= 4.5 V,
I
D
= 11 A
V
GS
= 10 V, I
D
= 12.5 A, T
J
=125
°
C
V
DS
= 10 V,
I
D
= 12.5 A
I
D
= 250
μ
A
1
2
3
V
Gate Threshold Voltage
– 5.6
7.4
9.5
9
48.4
mV/
°
C
m
S
R
DS(on)
Static Drain–Source
On Resistance
9
12
16
g
FS
Forward Transconductance
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
1444
342
135
pF
pF
pF
V
DS
= 15 V,
f = 1.0 MHz
V
GS
= 0 V,
R
G
Gate Resistance
V
GS
= 15 mV, f = 1.0 MHz
1.25
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
10
3.8
26
13
14
4
5
20
7.6
42
23
20
ns
ns
ns
ns
nC
nC
nC
V
DD
= 15 V,
V
GS
= 10 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 15 V,
V
GS
= 5 V
I
D
= 12.5 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
1.5
1.2
A
V
V
GS
= 0 V,
I
S
= 1.5 A
(Note 2)
0.73
25
15
nS
nC
I
F
= 12.5 A,
d
iF
/d
t
= 100 A/μs
Notes: 1.
surface of the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting
a)
60°C/W when
mounted on a 1in
2
pad
of 2 oz copper
b)
111°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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