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參數(shù)資料
| 型號： | FBL22033 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 3.3V BTL 8-bit latched/registered/pass-thru Futurebus universal interface transceiver |
| 中文描述： | 3.3橋接8位鎖存/注冊/直通Futurebus通用接口的收發(fā)器 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 147K |
| 代理商： | FBL22033 |
Philips Semiconductors
Product specification
FBL22033
3.3V BTL 8-bit latched/registered/pass-thru
universal transceiver with 30
termination
1999 Apr 15
4
PIN DESCRIPTION
SYMBOL
PIN NUMBER
TYPE
NAME AND FUNCTION
AI0 – AI7
50, 52, 3, 5, 8, 10, 12, 15
Input
Data inputs (TTL)
AO0 – AO7
51, 2, 4, 6, 9, 11, 14, 16
Output
3-State outputs (TTL)
B0 – B7
40, 38, 36, 34, 32, 30, 28, 26
I/O
Data inputs/Open Collector outputs, High current drive (BTL)
OEB0
23
Input
Enables the B outputs when High
OEB1
24
Input
Enables the B outputs when Low
OEA
43
Input
Enables the AO outputs when High
BUS GND
39, 37, 35, 33, 31, 29, 27, 25
GND
Bus ground (0V)
LOGIC GND
1, 13, 17, 49
GND
Logic ground (0V)
V
CC
18, 22, 48
Power
Positive supply voltage
BIAS V
41
Power
Live insertion pre-bias pin
BG V
CC
44
Power
Band Gap threshold voltage reference
BG GND
42
GND
Band Gap threshold voltage reference ground
SABn
20, 21
Input
Mode select from AI to B
SBAn
45, 46
Input
Mode select from B to AO
LCAB
47
Input
A-to-B clock/latch enable (transparent latch when High)
LCBA
19
Input
B-to-A clock/latch enable (transparent latch when High)
Loopback
7
Input
Enables loopback function when High (from AIn to AOn)
FUNCTION TABLE
INPUTS
OUTPUTS
MODE
AIn
Bn*
OEB0
OEB1
OEA
LCAB
LCBA
SAB
1
0
LL
SBA
1
0
XX
AOn
Bn
AIn to Bn thru mode
L
—
H
L
L
X
X
Z
H**
H
—
H
L
L
X
X
LL
XX
Z
L
AIn to Bn transparent latch
L
—
H
L
L
H
X
HX
XX
Z
H**
H
—
H
L
L
H
X
HX
XX
Z
L
AIn to Bn latch and read
l
—
H
L
L
↓
↓
↑
X
HX
XX
Z
H**
h
—
H
L
L
X
HX
XX
Z
L
AIn to Bn register
L
—
H
L
L
X
LH
XX
Z
H**
H
—
H
L
L
↑
X
LH
XX
Z
L
Bn outputs latched and read
(preconditioned latch)
X
—
H
L
L
L
X
HX
XX
Z
latched
data
Bn to AOn thru mode
X
L
L
H
H
X
X
XX
LL
H
input
X
H
L
H
H
X
X
XX
LL
L
input
Bn to AOn transparent latch
X
L
L
H
H
X
H
XX
HX
H
input
X
H
L
H
H
X
H
XX
HX
L
input
Bn to AOn latch and read
X
l
L
H
H
X
↓
↓
↑
↑
XX
HX
H
input
X
h
L
H
H
X
XX
HX
L
input
Bn to AOn register
X
L
L
H
H
X
XX
LH
H
input
X
H
L
H
H
X
XX
LH
L
input
AOn outputs latched and read
(preconditioned latch)
X
X
L
H
H
X
L
XX
HX
latched
data
X
相關PDF資料 |
PDF描述 |
|---|---|
| FBL22040 | 3.3V BTL8-bit TTL to BTL transceiver |
| FBL22040BB | 3.3V BTL8-bit TTL to BTL transceiver |
| FBL22041 | 3.3V BTL 7-bit Futurebus+ transceiver(standard A-port)(3.3V BTL7位預置總線增強型收發(fā)器（標準A口）) |
| FBL22041BB | 3.3V BTL 7-bit Futurebus transceiver standard A-port |
| FBP-100 | Fuse |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| FBL22033BB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single 8-Bit Inverting Bus Transceiver |
| FBL22040 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3.3V BTL8-bit TTL to BTL transceiver |
| FBL22040BB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3.3V BTL8-bit TTL to BTL transceiver |
| FBL22041 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3.3V BTL 7-bit Futurebus transceiver standard A-port |
| FBL22041BB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3.3V BTL 7-bit Futurebus transceiver standard A-port |
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