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| 型號(hào)： | FAN8026DTF |
| 英文描述： | MOTOR CONTROLLER |
| 中文描述： | 電機(jī)控制器 |
| 文件頁(yè)數(shù)： | 67/191頁(yè) |
| 文件大小： | 2018K |
| 代理商： | FAN8026DTF |
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FAN5061
15
P
Active Droop
The FAN5061 includes active droop; as the ouptut current
increases, the output voltage drops. This is done in order to
allow maximum headroom for transient response of the con-
verter. The current is sensed by measuring the voltage across
the high-side MOSFET during its on time. Note that this makes
the droop dependent on the temperature of the MOSFET. How-
ever, when the formula given for selecting R
S
(current limit) is
used, there is a maximum droop possible (-40mV), and when
this value is reached, additional drop across the MOSFET will
not cause any increase in droop—until current limit is reached.
Additional droop can be added to the active droop using a
discrete resistor (typically a PCB trace) outside the control
loop, as shown in Figure 2. This is typically only required for
the most demanding applications, such as for the next gener-
ation Intel processor (tolerance = +40/-70mV), as shown in
Figure 2.
Remote Sense
The FAN5061 offers remote sense of the output voltage to
minimize the output capacitor requirements of the converter.
It is highly recommended that the remote sense pin, Pin 16,
be tied directly to the processor power pins, so that the
effects of power plane impedance are eliminated. Further
details on use of the remote sense feature of the FAN5061
may be found in Applications Bulletin AB-24.
Adjusting the Linear Regulators’ Output Voltages
Any or all of the linear regulators’ outputs may be adjusted
high to compensate for voltage drop along traces, as shown
in Figure 6.
Figure 6. Adjusting the Output Voltage of the Linear
Regulator
The resistor value should be chosen as
For example, to get the V
TT
voltage to be 1.55V instead of
1.50V, use R = 10K
* [(1.55/1.50) – 1] = 333
.
Using the FAN5061 for Vnorthbridge = 1.8V
Similarly, the FAN5061 can also be used to generate Vnorth-
bridge = 1.8V by utilizing the AGP regulator as shown in
Figure 6: tie the TYPEDET pin to ground, and use R = 2K
.
PCB Layout Guidelines
￥ Placement of the MOSFETs relative to the FAN5061 is
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the FAN5061 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise radiates
throughout the board, and, because it is switching at such
a high voltage and frequency, it is very difTcult to suppress.
￥ In general, all of the noisy switching lines should be kept
away from the quiet analog section of the FAN5061. That
is, traces that connect to pins 1, 2, 19, and 20 (HIDRV, SW,
LODRV and VCCP) should be kept far away from the
traces that connect to pins 3, 16 and 17.
￥ Place the 0.1μF decoupling capacitors as close to the
FAN5061 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
￥ Each VCC and GND pin should have its own via to the
appropriate plane. This helps provide isolation between pins.
￥ Place the MOSFETs, inductor, and Schottky as close
together as possible for the same reasons as in the Trst
bullet above. Place the input bulk capacitors as close to
the drains of the high side MOSFETs as possible. In
addition, placement of a 0.1μF decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
￥ Place the output bulk capacitors as close to the CPU as
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converters performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
￥ A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
PC Motherboard Sample Layout and Gerber File
A reference design for motherboard implementation of the
FAN5061 along with the PCAD layout Gerber file and silk
screen can be obtained from our marketing department at
650-962-7833.
VFB
VGATE
VOUT
10K
R
R
10K
*
–1
V
out
V
nom
=
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