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參數(shù)資料
| 型號： | FAN6921MLMY |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 1764K |
| 描述： | IC CTLR PFC/FLYBACK 16-SOICN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 模式： | 臨界傳導(dǎo)（CRM） |
| 電流 - 啟動： | 10µA |
| 電源電壓： | 8.5 V ~ 25 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC N |
| 包裝： | 帶卷 (TR) |
?2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN6921ML " Rev. 1.0.3
17
PFC Peak Current Limiting (CSPFC pin)
During PFC stage switching operation, the PFC switch
current is detected by a current-sense resistor on the
CSPFC pin and the detected voltage on this resistor is
delivered to an input terminal of a comparator and
compared with a threshold voltage 0.6 V (typical). Once
the CSPFC pin voltage is higher than the threshold
voltage, PFC gate is turned off immediately.
The PFC peak switching current is adjustable by the
current-sense resistor. Figure 33 shows the measured
waveform of PFC gate and CSPFC pin voltage.
P F C M O S C u r r e n t L i m i t
C S P F C
O P F C
Figure 33. Cycle-by-Cycle Current Limiting
Brownin/out Protection (VIN Pin)
With AC voltage detection, FAN6921ML can perform
brownin/out protection (AC voltage UVP). Figure 34
shows the key operation waveforms. The VIN pin is
used to detect AC input voltage level and is connected
to AC input by a resistor divider (refer to Figure 1);
therefore, the V
VIN
voltage is proportional to the AC
input voltage. When the AC voltage drops; and V
VIN
voltage is lower than 1 V for 100 ms, the UVP
protection is activated and the COMP pin voltage is
clamped to around 1.6 V. Because PFC gate duty is
determined by comparing the sawtooth waveform and
COMP pin voltage, lower COMP voltage results in
narrow PFC on time, so that the energy converged is
limited and the PFC output voltage decreases. When
INV pin voltage is lower than 1.2 V, FAN6921ML stops
all PFC and PWM switching operation immediately
until V
DD
voltage drops to turn-off voltage then rises to
turn-on voltage again (UVLO).
When the brownout protection is activated, all switching
operation is turned off, the V
DD
voltage enters hiccup
mode up and down continuously. Until V
VIN
voltage is
higher than 1.2 V (typical) and V
DD
reaches turn-on
voltage again, the PWM and PFC gate is sent out.
The measured waveforms of brownin/out protection are
shown in Figure 35.
C Input
OPFC
VIN-UVP
V
VIN
V
VIN-RE-UVP
V
0V
Brownout
Protection
OPWM
V
INV
2.5V
Hiccup
V
INV-BO
V
COMP
1.2V
Brownout
Protection
Debounce
Time 100ms
1.6V
V
COMP-BO
Figure 34. Operation Waveforms of Brownin/out
Protection
In
V
D D
H i c c u p M o d e
B r o w n o u t
B r o w n i n
A C I n p u t
O P W M
O P F C
V
D D
Figure 35. Measured Waveform of Brownin/out
Protection (Adapter Application)
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