參數(shù)資料
型號(hào): FAN5660
廠商: Fairchild Semiconductor Corporation
英文描述: Monolithic Inductorless CMOS DC/DC Converter
中文描述: 電感器的CMOS單片DC / DC變換器
文件頁數(shù): 7/9頁
文件大?。?/td> 339K
代理商: FAN5660
FAN5660
REV. 1.0.2 3/28/02
7
Application Information
The FAN5660 capacitive charge pump circuit either inverts,
splits or doubles the input voltage (see Typical Applications).
For highest performance, capacitors with low effective series
resistance (ESR) should be used (see Capacitor Selection
section for more details). When using the inverting mode
with a supply voltage less than 2V, LV may be connected to
VSS. This bypasses the internal regulator circuitry and
provides best performance in low-voltage applications.
When using the inverter mode with a supply voltage above
2V, LV must be left open.
Negative Voltage Converter
The most common application of the FAN5660 is as a charge
pump voltage inverter. The operating circuit uses only two
identical external capacitors, C1 and C2 (see Typical
Circuits). Even though its output is not actively regulated,
the FAN5660 is very insensitive to load current changes.
A typical output source resistance of
input of +5V the output voltage is -5V under light load, and
decreases only to 4.5V with a load of 100mA.
5
means that with an
Capacitors selection
Low ESR capacitors should be used at the output of
FAN5660 to minimize output ripple, output resistance and to
maximize efficiency. This can be achieved using ceramic
capacitors, but certain types of tantalum capacitors may be
sufficient. Output ripple voltage is calculated observing that
the output current is solely supplied from capacitor C2
during one-half of the charge-pump cycle. This introduces a
peak-to-peak ripple of:
V
RIPPLE
= I
VSH
/(2f x C2 ) + I
VSH
×
(ESR C2)
For example, for a nominal f= 5kHz and C2 = 100μF with an
ESR of 0.05
, ripple is approximately 100mV with a
100mA load current. If C2 is raised to 470μF, the ripple
drops to approximately 25mV.
Positive Voltage Doubler
The FAN5660 operates in the voltage-doubling mode as
shown in Figure 2. The no-load output is 2
×
V
IN
.
Positive Voltage Splitter
The FAN5660 operates in voltage splitting mode as shown
Figure 3. The no-load output is V
IN
/2.
Changing Oscillator Frequency
Three modes control the FAN5660’s clock frequency, as
listed below:
When FC and SYNC are unconnected (open), the Oscillator
runs at 5kHz. When FC is connected to V+, the Oscillator
frequency increases 10 times. In the inverter mode, SYNC
may also be overdriven by an external clock source. A square
wave signal of 2V peak-to-peak typical may be applied to
SYNC via a 2 to 5nF capacitor to overdrive the internal
oscillator. When SYNC is overdriven, FC has no effect. In
some applications, the 5kHz output ripple frequency may be
low enough to interfere with other circuitry. If desired, the
Oscillator frequency can then be increased through use of the
FC pin or an external Oscillator as described above. Increas-
ing the clock frequency increases the FAN5660’s quiescent
current, but also allows smaller capacitance value to be used
for C1 and C2.
FC
Open
FC = V+
Open
SYNC
Open
Open
External
Clock
Oscillator frequency
5kHz
50kHz
External Clock
Frequency
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