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參數(shù)資料
| 型號(hào)： | FAN5602MP5X |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Universal (Step-Up/Step-Down) Charge Pump Regulated DC/DC Converter |
| 中文描述： | SWITCHED CAPACITOR REGULATOR, 1300 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | 3 X 3 MM, GREEN, MO-229VEEC, MLP-8 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 616K |
| 代理商： | FAN5602MP5X |
PRODUCT SPECIFICATION
FAN5602
REV. 1.1 10/7/04
11
Switch Configurations
The FAN5602 has seven built-in switch configurations
including 1:1, 3:2, 2:1 and 3:1 for step-down and 2:3, 1:2
and 1:3 for step-up.
When 1.5 x V
OUT
> V
IN
> V
OUT
, 1:1 mode shown in Fig.
1(a) is used. In this mode the internal oscillator is turned off.
The power transistors connecting the input and the output
become pass transistors and their gate voltages are controlled
by the linear regulation loop, the rest of power transistors are
turned off. In this mode the FAN5602 operates exactly like a
low dropout (LDO) regulator and the ripple of the output is
in the micro-volt range.
When 1.5 x V
OUT
> V
IN
> V
OUT
, 2:3 mode (step-up) shown
in Fig. 1(b) is used. In the charging phase two flying capaci-
tors are placed in series and each capacitor is charged to a
half of the input voltage. In pumping phase the flying capac-
itors are placed in parallel. The input is connected to the bot-
tom the capacitors so that the top of the capacitors is boosted
to a voltage equals V
IN
/2 + V
IN
, i.e., 3/2 x V
IN
. By connect-
ing the top of the capacitors to the output, one can ideally
charge the output to 3/2 x V
IN
. If 3/2 x V
IN
is higher than the
needed V
OUT
, the linear regulation loop will adjust the on-
resistance to drop some voltage. Boosting the voltage of the
top of the capacitors to 3/2 x V
IN
by connecting V
IN
the bot-
tom of the capacitors boosts the power efficiency 3/2 times.
In 2:3 mode the ideal power efficiency is V
OUT
/1.5 x V
IN
(For example, if V
IN
= 2V, V
OUT
= 2 x V
IN
= 4V, the ideal
power efficiency is 100%).
Switch Array
MID
MID
GND
S1A
S2A
TOP
C1+
C1-
C1
MID
Figure. 1a
Mode1(1:1)
TOP
GND
C1+
C1+
C1-
C1-
C1
C2
S1A
S1A
S2A
S3A
S4B
S5
S3B
Figure. 1b
Mode2 (2:3 or 3:2):
All Switches set for phase 1
and reverse state for phase 2
MID
TOP
GND
C1+
C2+
C1-
C2-
C1
C2
S1A
S2A
S2B
S4A
S4B
S5
S3B
Figure. 1d
Mode4 (1:3 or 3:1):
All Switches set for phase 1
and reverse state for phase 2
TOP
C1
C2
C1+
C1-
C2+
C2-
S3A
S4A
S1A
S2A
S3B
S4B
S1B
S2B
Figure. 1c
Mode3 (1:2 or 2:1):
All Switches set for phase 1
and reverse state for phase 2
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