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FAN5332A Rev. 1.0.1
F
Block Diagram
Figure 4. Block Diagram
Circuit Description
The FAN5332A is a pulse-width modulated (PWM) current-mode
boost converter. The FAN5332A improves the performance of bat-
tery-powered equipment by significantly minimizing the spectral
distribution of noise at the input caused by the switching action of
the regulator. To facilitate effective noise filtering, the switching fre-
quency was chosen to be high, 1.6MHz. An internal soft start cir-
cuitry minimizes in-rush currents. The timing of the soft start circuit
was chosen to reach 95% of the nominal output voltage within
maximum 5mS following an enable command when V
V
OUT
= 20.7V, I
LOAD
= 35mA and C
IN
μ
F.
= 2.7V,
OUT (EFFECTIVE)
=2.2
The device architecture is that of a current mode controller with
an internal sense resistor connected in series with the N-chan-
nel switch. The voltage at the feedback pin tracks the output
voltage at the cathode of the external Schottky diode (shown in
the test circuit). The error amplifier amplifies the difference
between the feedback voltage and the internal bandgap refer-
ence. The amplified error voltage serves as a reference voltage
to the PWM comparator. The inverting input of the PWM com-
parator consists of the sum of two components: the amplified
control signal received from the 30m
and the ramp generator voltage derived from the oscillator. The
oscillator sets the latch, and the latch turns on the FET switch.
Under normal operating conditions, the PWM comparator resets
the latch and turns off the FET, thus terminating the pulse.
Since the comparator input contains information about the out-
put voltage and the control loop is arranged to form a negative
feedback loop, the value of the peak inductor current will be
adjusted to maintain regulation.
current sense resistor
Every time the latch is reset, the FET is turned off and the cur-
rent flow through the switch is terminated. The latch can be
reset by other events as well. Over-current condition is moni-
tored by the current limit comparator which resets the latch and
turns off the switch instantaneously within each clock cycle.
Over-voltage condition is detected by a fast comparator limiting
the duty cycle in a similar manner to over-current monitoring
described above. Dimming may be accomplished by PWM mod-
ulating the SHDN input at a frequency around 100Hz.
Over-Voltage Protection
The voltage on the feedback pin is sensed by an OVP Compar-
ator. When the feedback voltage is 15% higher than the nominal
voltage, the OVP Comparator stops switching of the power tran-
sistor, thus preventing the output voltage from going higher.
Applications Information
Setting the Output Voltage
The internal reference (V
age is divided by a resistor divider, R1 and R2 to the FB pin.
The output voltage is given by
REF
) is 1.23V (Typical). The output volt-
According to this equation, and assuming desired output volt-
age of 20.7V, good choices for the feedback resistors are,
R
1
=160k
and R
2
=10k
.
Inductor Selection
The inductor parameters directly related to device performances
are saturation current and dc resistance. The FAN5332A oper-
ates with a typical inductor value of 6.8μH. The lower the dc
resistance, the higher the efficiency. Usually a trade-off between
Reference
Oscillator
Soft-Start
n
FB
FB
Error
+
Comp
-
Over
Voltage
Comp
-
+
+
Σ
Ramp
Generator
R
R
R
Q
S
Current Limit
Comparator
0.03
W
1.15 x V
REF
Shutdown
Circuitry
Thermal
Shutdown
SHDN
4
GND
SW
1
V
IN
5
Amp
2
3
+
-
-
+
-
Driver
V
OUT
V
REF
1
R
1
R
2
------
+
=