參數(shù)資料
型號: FAN5109MX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: MOSFETs
英文描述: Terminal Block; No. of Positions:9; Pitch Spacing:0.197"; Mounting Type:PC Board RoHS Compliant: Yes
中文描述: 3.5 A BUF OR INV BASED MOSFET DRIVER, PDSO8
封裝: 0.150 INCH, LEAD FREE, MS-012AA, SOIC-8
文件頁數(shù): 2/13頁
文件大小: 119K
代理商: FAN5109MX
2
www.fairchildsemi.com
FAN5109 Rev. 1.0.4
F
Typical Application
Figure 1. Typical Application
Pin Configuration
Figure 2. 8-Pin SOIC Package
Pin Definitions
Pin #
Pin Name
Pin Function Description
1
BOOT
Bootstrap Supply Input.
Connect to bootstrap capacitor and diode.
PWM Signal Input.
Accepts a logic-level PWM signal from the controller.
Output Disable.
When low, this pin disables FET switching (HDRV and LDRV are
held low).
Power Input
. +12V bias power. Bypass with a 1μF ceramic capacitor.
Low Side Gate Drive Output.
Connect to the gate of the low-side power MOSFET(s).
Power Ground.
Connect directly to the source of low-side MOSFET(s) and C
Switch Node Input
. Connect as shown in Figure 1. SW provides return for the high-side
bootstrapped driver and acts as a sense point for the adaptive shoot-thru protection.
Provides voltage supply to the high-side MOSFET driver.
2
PWM
3
OD
4
VCC
5
LDRV
6
PGND
VCC.
7
SW
8
HDRV
High Side Gate Drive Output
.
Connect to the gate of the high-side power MOSFET(s).
SW
FAN5109
12V
VCC
OVERLAP
PROTECTION
CIRCUIT
6
5
7
8
1
PWM
2
BOOT
VCC
4
Q1
Q2
L1
3
HDRV
LDRV
PGND
OD
C
BOOT
V
OUT
C
OUT
C
VCC
D1
BOOT
PWM
OD
VCC
FAN5109
1
2
3
4
8
7
6
5
HDRV
SW
PGND
LDRV
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