參數(shù)資料
型號: FAN5098
廠商: Fairchild Semiconductor Corporation
英文描述: Two Phase Interleaved Synchronous Buck Converter for AMD Hammer⑩
中文描述: 兩相交錯同步降壓轉(zhuǎn)換器為AMD錘⑩
文件頁數(shù): 4/17頁
文件大?。?/td> 460K
代理商: FAN5098
FAN5098
PRODUCT SPECIFICATION
4
REV. 1.0.7 2/18/03
Electrical Specifications
(V
CC
= 12V, VID = [00100] = 1.450V, and T
The
denotes speci
fi
cations which apply over the full operating temperature range.
A
= +25
°
C using circuit in Figure 2, unless otherwise noted.)
Notes:
1. As measured at the converter
s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than
0.5m
trace resistance between the converter
s output capacitors and the CPU. Remote sensing should be used for optimal
performance. Nominal output is offset +25mV vs. VID table.
2. Using the VFB pin for remote sensing of the converter
s output at the load, the converter will be in compliance with AMD
specification of V
DAC
±50mV.
Parameter
Input Supply
UVLO Hysteresis
12V UVLO
12V Supply Current
Internal Voltage Regulator
BYPASS Voltage
BYPASS Capacitor
VREF and DAC
Output Voltage
Initial Voltage Setpoint
Output Temperature Drift
Line Regulation
Droop
Programmable Droop Range
Response Time
Current Mismatch
Conditions
Min.
Typ.
Max.
Units
1.0
9.6
20
V
V
Rising Edge
PWM Output Open
8.5
10.4
mA
4.75
100
5
5.25
V
nF
See Table 1
I
LOAD
= 0A, VID = [00100]
T
A
= 0 to 70
°
C
V
CC
= 11.4V to 12.6V
I
LOAD
= 52A, R
0.800
1.466
1.550
1.489
V
V
1
1.475
5
130
23
mV
μV
mV
m
nsec
%
2
DROOP
= 4.99k
0
1.25
R
I
LOAD
V
out
= 10mV
(A) = R
= 52A Droop = 1m
100
5
DS,on
DS,on
(B),
VID Inputs
Input LOW current, VID pins
VID V
IH
VID V
IL
No CPU VID Latency
Oscillator
Oscillator Frequency
Oscillator Range
Maximum Duty Cycle
Minimum LDRV on-time
Gate Drive
Gate Drive On-Resistance
Output Driver Rise & Fall Time
Enable/Soft Start
Soft Start Current
Enable Threshold
V
VID
= 0.4V
-60
2.0
μA
V
V
ns
0.8
VID = [11111] to PWM low
200
RT = 54.9k
RT = 137.5k
RT = 137.5k
RT = 13.75k
440
200
500
560
2000
kHz
kHz
%
nsec
to 13.75 k
90
330
1.0
20
See Figure 1, C
L
= 3000pF
nsec
10
μA
V
ON
OFF
1.0
0.4
Power Good
PWRGD Threshold
PWRGD Output Voltage
PWRGD Delay
PWRGD Delay
OVP and OTP
Output Overvoltage Detect
Over Temperature Shutdown
Over Temperature Hysteresis
Logic LOW, V
I
sink
= 4mA
High
Low
High
VID
V
PWRGD
300
350
367
0.4
mV
V
μsec
ms
Low
500
5
20
2.1
130
2.3
150
V
°
C
°
C
140
40
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