參數(shù)資料
型號: F49L004BA
廠商: Elite Semiconductor Memory Technology Inc.
英文描述: 4 Mbit (512K x 8) 3V Only CMOS Flash Memory
中文描述: 4兆位(為512k × 8)3V時僅閃存的CMOS
文件頁數(shù): 18/46頁
文件大?。?/td> 371K
代理商: F49L004BA
EFS T
preliminary
F49L004UA / F49L004BA
Elite Flash Storage Technology Inc.
Publication Date : Aug. 2003
Revision: 0.2 18/46
OPERATING RANGES
Commercial (C) Devices
Ambient Temperature (TA) . . . . . . . . . . . 0°C to +70°C
V
CC
Supply Voltages
V
CC
for all devices . . . . . . . . . . . . . . . . . . . . .2.7 V to 3.6 V
Operating ranges define those limits between which the functionality of the device is guaranteed.
Table 8. Capacitance T
A
= 25°C
, f = 1.0 MHz
Symbol
Description
Conditions
Min.
Typ.
Max.
Unit
C
IN1
Input Capacitance
V
IN
= 0V
8
pF
C
IN2
Control Pin
Capacitance
V
IN
= 0V
12
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
9. DC CHARACTERISTICS
Table 9. DC Characteristics T
A
= 0C to 70C, V
CC
= 2.7V to 3.6V
Symbol
Description
Conditions
Min.
Typ.
Max.
Unit
I
LI
Input Leakage Current
V
IN
= V
SS
or V
CC
, V
CC
= V
CC
max.
±
1
uA
I
LIT
A9 Input Leakage Current
V
CC
= V
CC
max; A9=12.5V
35
uA
I
LO
Output Leakage Current
V
OUT
= V
SS
or V
CC
, V
CC
= V
CC
max
±
1
uA
@5MHz
7
12
mA
I
CC1
V
CC
Active Read Current
CE
= V
IL
,
OE
= V
IH
@1MHz
2
4
mA
I
CC2
V
CC
Active write Current
CE
= V
IL
,
OE
= V
IH
15
30
mA
I
CC3
V
CC
Standby Current
V
CC
Standby Current
During Reset
CE
;
ESET
R
= V
CC
±
0.3V
0.2
5
uA
I
CC4
ESET
R
= V
SS
±
0.3V
0.2
5
uA
I
CC5
Automatic sleep mode
V
IH
= V
CC
±
0.3V; V
IL
= V
SS
±
0.3V
0.2
5
uA
V
IL
Input Low Voltage(Note 1)
-0.5
0.8
V
V
IH
Input High Voltage
0.7x V
CC
V
CC
+ 0.3
V
V
ID
Voltage for Auto-Select
and Temporary Sector
Unprotect
V
CC
=3.3V
11.5
12.5
V
V
OL
Output Low Voltage
I
OL
= 4.0mA, V
CC
= V
CC
min
0.45
V
V
OH1
Output High Voltage(TTL)
I
OH
= -2mA, V
CC
= V
CC
min
0.85x V
CC
V
OH2
Output High Voltage
I
OH
= -100uA, V
CC
min
V
CC
-0.4
V
LKO
Low V
CC
Lock-out Voltage
2.3
2.5
V
Notes :
1. V
IL
min. = -1.0V for pulse width is equal to or less than 50 ns.
V
IL
min. = -2.0V for pulse width is equal to or less than 20 ns.
2. V
max. = V
+ 1.5V for pulse width is equal to or less than 20 ns
If V
is over the specified maximum value, read operation cannot be guaranteed.
3. Automatic sleep mode enable the low power mode when addresses remain stable for 250 ns
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