
MB91360G Series
38
I
HANDLING DEVICES
1.
Preventing latch-up
Latch-up may occur in a CMOS IC if a voltage greater than V
DD
or less than V
SS
is applied to an input or output
pin or if the voltage applied between V
DD
and V
SS
exceeds the rating. If latch-up occurs, the power supply current
increases rapidly resulting in thermal damage to circuit elements. Therefore, ensure that maximum ratings are
not exceeded in circuit operation.
Connecting unused pins
2.
Leaving unused input pins open may result in misbehavior or latch up and possible permanent damage of the
device. Therefore they must be tied to V
DD
or V
SS
through resistors. In this case those resistors should be more
than 2 KOhm.
Unused bidirectional pins should be set to the output state and can be left open, or the input state with the above
described connection.
The resistor of more than 2 KOhm is used to limit currents through the protection diodes. In case of voltages at
the not used pin of 0.3 V or more below V
SS
or 0.3 V or more above V
DD
currents which could cause latch-up will
flow through those diodes.
External reset input
3.
When inputting an “L” level to the INITX pin, hold this low level at the INITX pin long enough so that after release
of the low level at INITX and the passing of the built in waiting time stable oscillation of the oscillation circuit is
achieved. INITX must be pulled low for at least 8 cycles of the 4 MHz oscillation clock.
Power supply pins
4.
All V
DD
pins should be connected to the same potential (exception can be the external bus interface on F362GA
and F369GA) . The analogue supply voltage (AV
CC
) must not be turned on before the digital supply voltage. If
the external bus interface is supplied with 3.3 V this voltage also must not be turned on before the 5 V digital
voltage has been switched on. If the supply voltage to the external bus interface is switched off (it may not be
tristate but should be pulled low) it must be made sure that all related signals do not have a voltage higher than
this pulled down supply.
When multiple V
DD
and V
SS
pins are provided, be sure to connect all V
DD
and V
SS
pins to the power supply or
ground externally. Although pins at the same potential are connected together in the internal device design so
as to prevent malfunctions such as latch-up, connecting all V
DD
and V
SS
pins appropriately minimizes unwanted
radiation, prevents malfunction of strobe signals due to increases in the ground level, and keeps the overall
output current rating.
Also, take care to connect V
DD
and V
SS
to current source in the lowest possible impedance.
Connection of a ceramic bypass capacitor of approximately 0.1
μ
F between V
DD
and V
SS
close to the device is
recommended.
The MB91360G series contains a regulator. To use the device with the 5-V power supply, supply 5-V power to
the V
CC
pins and be sure to connect a bypass capacitor of 10
μ
F parallel to 10 nF to the V
CC
3C pin for the regulator.
[Use with 5-V power supply]
5 V
5 V
10
μ
F
10 nF
V
CC
3C
V
CC
AV
CC
AVRH
AV
SS
V
SS
GND