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參數(shù)資料
| 型號： | EX64-FTQG64 |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 39/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA ANTIFUSE 3K 64-TQFP |
| 標準包裝： | 160 |
| 系列： | EX |
| 邏輯元件/單元數(shù)： | 128 |
| 輸入/輸出數(shù)： | 41 |
| 門數(shù)： | 3000 |
| 電源電壓： | 2.3 V ~ 2.7 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-TQFP（10x10） |
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Datasheet Information
3-2
Revision 10
v4.0
(continued)
The "Flexible Mode" section was updated.
The "TRST Pin" section was updated.
The "Probing Capabilities" section is new.
The "Programming" section was updated.
The "Probing Capabilities" section was updated.
The "Silicon Explorer II Probe" section was updated.
The "Design Considerations" section was updated.
The "Development Tool Support" section was updated.
The "Absolute Maximum Ratings*" section was updated.
The "Temperature and Voltage Derating Factors" section was updated.
The "TDI, I/O Test Data Input" section was updated.
The "TDO, I/O Test Data Output" section was updated.
The "TMS Test Mode Select" section was updated.
The "TRST, I/O Boundary Scan Reset Pin" section was updated.
All VSV pins were changed to VCCA. The change affected the following pins:
64-Pin TQFP –
Pin 36
100-Pin TQFP –
Pin 57
49-Pin CSP –
Pin D5
128-Pin CSP–
Pin H11 and Pin J1 for eX256
180-Pin CSP –
Pins J12 and K2
v3.0
The "Recommended Operating Conditions" section has been changed.
The "3.3 V LVTTL Electrical Specifications" section has been updated.
The "5.0 V TTL Electrical Specifications" section has been updated.
The "Total Dynamic Power (mW)" section is new.
The "eX Timing Model" section has been updated.
v2.0.1
The I/O Features table, Table 1-2 on page 1-6, was updated.
= 2.5 V, TJ = 25° C" section, was updated.
"Typical eX Standby Current at 25°C" section is a new table.
The table in the section, "Package Thermal Characteristics" section has been updated
for the 49-Pin CSP.
The "eX Timing Model" section has been updated.
The timing numbers found in, "eX Family Timing Characteristics" section have been
updated.
Please see the following pin tables for the VSV pin and an important footnote including
2-6, 2-11
The figure, "TQ64" section has been updated.
Revision
Changes
Page
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EX64-FTQ64 | IC FPGA ANTIFUSE 3K 64-TQFP |
| AGL030V2-QNG68I | IC FPGA 1KB FLASH 30K 68-QFN |
| AGLN030V2-ZQNG68I | IC FPGA NANO 1KB 30K 68-QFN |
| AGLN020V2-CSG81I | IC FPGA NANO 1KB 20K 81-CSP |
| AGLN030V2-ZUCG81 | IC FPGA NANO 1KB 30K 81-UCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EX64-PCS100 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:eX Automotive Family FPGAs |
| EX64-PCS100A | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:eX Family FPGAs |
| EX64-PCS100I | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:eX Family FPGAs |
| EX64-PCS100PP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
| EX64-PCS128 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:eX Family FPGAs |
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