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參數(shù)資料
| 型號(hào)： | EVB3020A-IFBD |
| 英文描述： | GSM Multiband RF Transceiver |
| 中文描述： | 手機(jī)多頻段射頻收發(fā)器 |
| 文件頁數(shù)： | 13/44頁 |
| 文件大小： | 409K |
| 代理商： | EVB3020A-IFBD |
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Advance Data Sheet
W3020 GSM Multiband RF Transceiver
December 1999
20
Lucent Technologies Inc.
Programming Information (continued)
The Data Word
The W3020 and W3000 chips are addressed through the bit content of the 24-bit serial word. Some words for
time-critical interactions address both W3020 and W3000 at the same time, while some words for initialization
address W3020 and W3000 separately.
The W3020 gets all of its control information via a three-wire serial bus from the baseband IC. Serial data
transfers always consist of 24 bits: 3 bits of address to select one of five control registers, and up to 21 bits of
data. The data is shifted first into a shift register and then parallel-loaded into the proper control register after the
completion of the transfer when the latch enable signal goes high. The last bit is that which immediately precedes
a low-to-high latch input transition occurring while the CLOCK input is low. Bit 24 is loaded first, and bit 1 is
loaded last. The four control registers are defined as follows:
n
TR: Transmit/receive register for W3020. Contains bits for setting various transmit and receive modes, setting
receive gain, etc. It is expected that this register would be written several times during a frame.
n
CONFIG: Contains bits to control various options for dc offset correction, filter-tuning, lock detect, and
overload outputs, etc. It is expected that this register would be written once at initialization and then rarely
updated. Since it is not affected by the power-on reset circuit, a write to this register should be the first
operation performed when accessing the W3020 chip. Also, it is advisable never to update the configuration
register while a critical operation is in progress.
n
MAIN: Main counter and prescaler values for W3000 chip. Used to set mode and band bit functions for the
W3020 while programming the W3000.
n
REF: Reference counter values for W3000. Not relevant to W3020.
Table 12. Register Addressing
A2
A1
A0
Register
Device
1
0
TR
W3020
1
0
1
CONFIG
W3020
1
0
RESERVED
W3020
1
RESERVED
W3020
0
X
0
M MAIN
W3000
0
X
1
M REF
W3000
Note: X indicates that the bit does not affect addressing for the given
combination of A2 and A0 that addresses the W3000. In the W3000, the
A1 bit is used for data content.
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