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| 型號： | EVAL-CN0202-SDPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD CFTL AD5662 |
| 設(shè)計資源： | CN-0202 CFTL Eval/Design Support |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Circuits from the Lab™ |
| 主要目的： | 參考設(shè)計，模擬輸出模塊 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD5662，AD5750 |
| 已供物品： | 板 |
| 其它名稱： | EVAL-CN0202-SPDZ EVAL-CN0202-SPDZ-ND |
AD5662
Rev. A | Page 13 of 24
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy or integral nonlinearity is a
measurement of the maximum deviation, in LSBs, from a
straight line passing through the endpoints of the DAC transfer
function. A typical INL vs. code plot can be seen in Figure 4.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ±1 LSB maximum
ensures monotonicity. This DAC is guaranteed monotonic by
design. A typical DNL vs. code plot can be seen in Figure 5.
Zero-Code Error
Zero-code error is a measurement of the output error when
zero code (0x0000) is loaded to the DAC register. Ideally, the
output should be 0 V. The zero-code error is always positive in
the AD5662 because the output of the DAC cannot go below
0 V. It is due to a combination of the offset errors in the DAC
and the output amplifier. Zero-code error is expressed in mV. A
plot of zero-code error vs. temperature can be seen in Figure 11.
Full-Scale Error
Full-scale error is a measurement of the output error when full-
scale code (0xFFFF) is loaded to the DAC register. Ideally, the
output should be VDD 1 LSB. Full-scale error is expressed in
percent of full-scale range. A plot of full-scale error vs.
temperature can be seen in Figure 10.
Gain Error
This is a measure of the span error of the DAC. It is the deviation
in slope of the DAC transfer characteristic from ideal expressed
as a percent of the full-scale range.
Total Unadjusted Error (TUE)
Total unadjusted error is a measurement of the output error,
taking all the various errors into account. A typical TUE vs.
code plot can be seen in Figure 6.
Zero-Code Error Drift
This is a measurement of the change in zero-code error with a
change in temperature. It is expressed in μV/°C.
Gain Temperature Coefficient
This is a measurement of the change in gain error with changes
in temperature. It is expressed in (ppm of full-scale range)/°C.
Offset Error
Offset error is a measure of the difference between VOUT (actual)
and VOUT (ideal) expressed in mV in the linear region of the
transfer function. Offset error is measured on the AD5662 with
Code 512 loaded in the DAC register. It can be negative or positive.
DC Power Supply Rejection Ratio (PSRR)
This indicates how the output of the DAC is affected by changes
in the supply voltage. PSRR is the ratio of the change in VOUT to a
change in VDD for full-scale output of the DAC. It is measured in
dB. VREF is held at 2 V, and VDD is varied by ±10%.
Output Voltage Settling Time
This is the amount of time it takes for the output of a DAC to settle
to a specified level for a to full-scale input change and is
measured from the 24th falling edge of SCLK.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state. It is normally specified as the area of the glitch in nV-s,
and is measured when the digital input code is changed by
1 LSB at the major carry transition (0x7FFF to 0x8000). See
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital inputs of the
DAC, but is measured when the DAC output is not updated. It
is specified in nV-s, and measured with a full-scale code change
on the data bus, that is, from all 0s to all 1s and vice versa.
Total Harmonic Distortion (THD)
This is the difference between an ideal sine wave and its attenuated
version using the DAC. The sine wave is used as the reference for
the DAC, and the THD is a measurement of the harmonics present
on the DAC output. It is measured in dB.
Noise Spectral Density
This is a measurement of the internally generated random noise.
Random noise is characterized as a spectral density (voltage per
√Hz). It is measured by loading the DAC to midscale and meas-
uring noise at the output. It is measured in nV/√Hz. A plot of
noise spectral density can be seen in Figure 31.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-CN0202-SPDZ | 制造商:Analog Devices 功能描述:EVAL-CN0202-SDPZ |
| EVAL-CN0203-SDPZ | 功能描述:BOARD CFTL AD5660-1 AD5750-1 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:Circuits from the Lab™ 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:數(shù)字電位器 嵌入式:- 已用 IC / 零件:AD5258 主要屬性:- 次要屬性:- 已供物品:板 相關(guān)產(chǎn)品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP |
| EVAL-CN0203-SPDZ | 制造商:Analog Devices 功能描述:AD5750-1, AD5660-1, PLC / DCS, ANALOG OUTPUT MOD, Silicon Manufacturer:Analog De |
| EVAL-CN0204-SDPZ | 功能描述:BOARD CFTL AD5662 AD5751 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:Circuits from the Lab™ 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:數(shù)字電位器 嵌入式:- 已用 IC / 零件:AD5258 主要屬性:- 次要屬性:- 已供物品:板 相關(guān)產(chǎn)品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP |
| EVAL-CN0204-SDPZ | 制造商:Analog Devices 功能描述:AD5751 AD5662 PLC / DCS ANALOG OUTPUT |
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