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| 型號(hào)： | EVAL-ADM2484EEBZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADM2484 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | iCoupler® |
| 主要目的： | 接口，收發(fā)器，RS-422/RS-485 |
| 已用 IC / 零件： | ADM2484 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | ADM2484EBRWZ-ND - IC TXRX RS485 ISO W/ESD 16SOIC ADM2484EBRWZ-REEL7-ND - IC TXRX RS485 ISO W/ESD 16SOIC |
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ADM2484E
Data Sheet
Rev. D | Page 14 of 16
APPLICATIONS INFORMATION
ISOLATED POWER SUPPLY CIRCUIT
The ADM2484E requires isolated power capable of 3.3 V at up
to approximately 75 mA (this current is dependent on the data
rate and termination resistors used) to be supplied between the
VDD2 and the GND2 pins. A transformer driver circuit with a
center tapped transformer and LDO can be used to generate the
isolated 5 V supply, as shown in Figure 28. The center tapped
transformer provides electrical isolation of the 5 V power
supply. The primary winding of the transformer is excited with
a pair of square waveforms that are 180° out of phase with each
other. A pair of Schottky diodes and a smoothing capacitor are
used to create a rectified signal from the secondary winding.
The ADP3330 linear voltage regulator provides a regulated
+
IN
OUT
SD
ERR
NR
GND
ADP3330
VCC
+
3.3V
10F
22F
ADM2484E
VDD1
VDD2
GND1
GND2
SD103C
78253
ISOLATION
BARRIER
TRANSFORMER
DRIVER
06
98
4-
02
6
Figure 28. Isolated Power Supply Circuit
PC BOARD LAYOUT
The ADM2484E isolated RS-485 transceiver requires no external
interface circuitry for the logic interfaces. Power supply bypassing
is required at the input and output supply pins (see Figure 29).
Bypass capacitors are conveniently connected between Pin 1
and Pin 2 for VDD1 and between Pin 15 and Pin 16 for VDD2.
Best practice suggests the following:
A capacitor value between 0.01 μF and 0.1 μF.
A total lead length between both ends of the capacitor and
the input power supply pin that does not exceed 20 mm.
Unless the ground pair on each package side is connected
close to the package, consider bypassing between Pin 1 and
Pin 8 and between Pin 9 and Pin 16.
VDD1
GND1
RxD
RE
DE
TxD
NC
GND1
VDD2
GND2
A
B
Z
Y
NC
GND2
NC = NO CONNECT
ADM2484E
0
69
84
-02
7
Figure 29. Recommended PCB Layout
In applications involving high common-mode transients, ensure
that board coupling across the isolation barrier is minimized.
Furthermore, design the board layout so that any coupling that
does occur equally affects all pins on a given component side.
Failure to ensure this could cause voltage differentials between pins
exceeding the absolute maximum ratings of the device, thereby
leading to latch-up or permanent damage.
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