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參數(shù)資料
| 型號： | EVAL-ADM2482EEB3Z |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADM2482 |
| 標準包裝： | 1 |
| 主要目的： | 接口，收發(fā)器，RS-485 |
| 已用 IC / 零件： | ADM2482 |
| 已供物品： | 板 |
ADM2482E/ADM2487E
Rev. A | Page 14 of 20
CIRCUIT DESCRIPTION
ELECTRICAL ISOLATION
TRUTH TABLES
The truth tables in this section use the abbreviations found in
In the ADM2482E/ADM2487E, electrical isolation is imple-
mented on the logic side of the interface. Therefore, the part
has two main sections: a digital isolation section and a transceiver
section (see Figure 30). Driver input and data enable applied to
the TxD and DE pins, respectively, and referenced to logic ground
(GND1) are coupled across an isolation barrier to appear at the
transceiver section referenced to isolated ground (GND2). Simi-
larly, the receiver output, referenced to isolated ground in the
transceiver section, is coupled across the isolation barrier to
appear at the RxD pin referenced to logic ground.
Table 10. Truth Table Abbreviations
Letter
Description
H
High level
I
Indeterminate
L
Low level
X
Irrelevant
Z
High impedance (off )
NC
Disconnected
Table 11. Transmitting
iCoupler Technology
The digital signals transmit across the isolation barrier using
iCoupler technology. This technique uses chip scale transformer
windings to couple the digital signals magnetically from one
side of the barrier to the other. Digital inputs are encoded into
waveforms that are capable of exciting the primary transformer
winding. At the secondary winding, the induced waveforms are
decoded into the binary value that was originally transmitted.
Supply Status
Inputs
Outputs
VDD1
VDD2
DE
TxD
Y
Z
On
H
L
On
H
L
H
On
L
X
Z
On
Off
X
Z
Off
On
L
X
Z
Off
X
Positive and negative logic transitions at the input cause narrow
pulses (~1 ns) to be sent to the decoder, via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than ~1 μs, a periodic set
of refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than about 5 μs, then the input side is
assumed to be unpowered or nonfunctional, in which case the
output is forced to a default state (see Table 10).
X
Z
Table 12. Receiving
Supply Status
Inputs
Outputs
VDD1
VDD2
RE
A B
RxD
On
>0.03 V
L or NC
H
On
<0.2 V
L or NC
L
On
0.2 V < A B < 0.03 V
L or NC
I
On
Inputs open
L or NC
H
On
X
H
Z
On
Off
VDD1
GND1
GND2
VDD2
D1 D2
OSC
ENCODE
DECODE
ENCODE
DECODE
ENCODE
DECODE
DIGITAL ISOLATION
TRANSCEIVER
D
R
DE
TxD
RxD
RE
ISOLATION
BARRIER
Y
Z
A
B
07
37
9-
0
22
X
L or NC
H
Off
L or NC
X
L
Figure 30. ADM2482E/ADM2487E Digital Isolation and Transceiver Sections
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