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參數(shù)資料
| 型號： | EVAL-AD974CB |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/20頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD974 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±10 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 120mW @ 200kSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD974 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD974BRZ-ND - IC DAS 16BIT 4CH 200KSPS 28SOIC AD974BNZ-ND - IC DAS 16BIT 4CH 200KSPS 28DIP AD974ARZ-ND - IC DAS 16BIT 4CH 200KSPS 28-SOIC AD974ARSZ-ND - IC DAS 16BIT 4CH 200KSPS 28-SSOP AD974ANZ-ND - IC DAS 16BIT 4CH 200KSPS 28DIP AD974BRS-RL7-ND - IC DAS 16BIT 4CH 200KSPS 28SSOP AD974BRSZ-ND - IC DAS 16BIT 4CH 200KSPS 28-SSOP AD974BRS-ND - IC DAS 16BIT 4CH 200KSPS 28-SSOP AD974BR-ND - IC DAS 16BIT 4CH 200KSPS 28-SOIC AD974BN-ND - IC DAS 16BIT 4CH 200KSPS 28-DIP 更多... |
REV. A
AD974
–17–
TEMPERATURE – C
110
80
–75
150
–50
–25
0
25
50
75
100
125
105
100
95
90
85
–80
–110
–85
–90
–95
–100
–105
SFDR,
S/N
+
D
–
dB
SNRD
SFDR
THD
–
dB
Figure 20. AC Parameters vs. Temperature
DC CODE UNCERTAINTY
Ideally, a fixed dc input should result in the same output code
for repetitive conversions; however, as a consequence of un-
avoidable circuit noise within the wideband circuits of the ADC,
a range of output codes may occur for a given input voltage.
Thus, when a dc signal is applied to the AD974 input, and
10,000 conversions are recorded, the result will be a distribution
of codes as shown in Figure 21. This histogram shows a bell
shaped curve consistent with the Gaussian nature of thermal
noise. The histogram is approximately seven codes wide. The
standard deviation of this Gaussian distribution results in a code
transition noise of 1 LSB rms.
4000
0
–3
–2
–1
0
12
34
3500
2000
1500
1000
500
3000
2500
Figure 21. Histogram of 10,000 Conversions of a DC Input
POWER-DOWN FEATURE
The AD974 has analog and reference power-down capability
through the PWRD pin. When the PWRD pin is taken high,
the power consumption drops from a maximum value of
100 mW to a typical value of 50
W. When in the power-
down mode the previous conversion results are still available in
the internal registers and can be read out providing it has not
already been shifted out.
When used with an external reference, connected to the REF
pin and a 2.2
F capacitor, connected to the CAP pin, the
power-up recovery time is typically 1 ms. This typical value of
1 ms for recovery time depends on how much charge has de-
cayed from the external 2.2
F capacitor on the CAP pin and
assumes that it has decayed to zero. The 1 ms recovery time has
been specified such that settling to 16 bits has been achieved.
When used with the internal reference, the dominant time con-
stant for power-up recovery is determined by the external ca-
pacitor on the REF pin and the internal 4K impedance seen at
that pin. An external 2.2
F capacitor is recommended for the
REF pin.
CROSSTALK
The crosstalk between adjacent channels, nonadjacent channels
and worst-case adjacent channels is shown in Figures 22 to 24.
The worst-case crosstalk occurs between channels 1 and 2.
–80
–115
1
10
100
1000
–95
–100
–105
–110
–85
–90
10000
ACTIVE CHANNEL INPUT FREQUENCY – kHz
RESULTING
AMPLITUDE
ON
SELECTED
CHANNEL
(dB)
WITH
INPUT
GROUNDED
ADJACENT CHANNELS,
WORST PAIR
NONADJACENT
CHANNELS
Figure 22. Crosstalk vs. Input Frequency (kHz)
0
–130
12
–90
–100
–110
–120
–70
–80
FREQUENCY – kHz
dBFS
4
6
8
10
12
14
16
18
20
–60
–40
–50
–30
–10
–20
Figure 23. Adjacent Channel Crosstalk, Worst Pair
(8192 Point FFT; AIN 2 = 1.02 kHz, –0.1 dB; AIN 1 = AGND)
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