參數(shù)資料
型號： EVAL-AD7879-1EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 31/41頁
文件大小： 0K
描述： BOARD EVALUATION FOR AD7879-1
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，觸摸屏控制器
嵌入式： 否
已用 IC / 零件： AD7879-1
主要屬性： 4 線電阻式觸控屏控制器，I²C 和 SPI 接口
次要屬性： 圖形用戶界面，USB 接口
已供物品： 板，線纜，CD，觸控屏
AD7879/AD7889
Rev. C | Page 36 of 40
NOTES
1. A START CONDITION AT THE BEGINNING IS DEFINED AS A HIGH-TO-LOW TRANSITION ON SDA WHILE SCL REMAINS HIGH.
2. A STOP CONDITION AT THE END IS DEFINED AS A LOW-TO-HIGH TRANSITION ON SDA WHILE SCL REMAINS HIGH.
3. THE MASTER GENERATES THE ACK AT THE END OF THE READBACK TO SIGNAL THAT IT DOES NOT WANT ADDITIONAL DATA.
4. 7-BIT DEVICE ADDRESS [DEV A6:DEV A0] = [01011XX], WHERE THE TWO LSB Xs ARE DON'T CARE BITS.
5. REGISTER DATA [D15:D8] AND REGISTER DATA [D7:D0] ARE ALWAYS SEPARATED BY A LOW ACK BIT.
6. THE R/W BIT IS SET TO 1 TO INDICATE A READBACK OPERATION.
SDA
DEV
A6
DEV
A5
DEV
A4
R/W
SCL
DEV
A3
1
2
3
4
17
18
DEV
A2
DEV
A1
DEV
A0
ACK
A7
A6
11
16
5
6
7
8
9
10
START
AD7879-1/AD7889-1
DEVICE ADDRESS
A1
A0
REGISTER ADDRESS[A7:A0]
ACK
26
19
21
25
28
27
35
29
36
D1
D0
D7
D6
REGISTER DATA[D7:D0]
SR
ACK
37
P
DEV
A6
DEV
A5
DEV
A4
1
2
3
t
2
AD7879-1/AD7889-1
DEVICE ADDRESS
AD7879-1/AD7889-1
DEVICE ADDRESS
DEV
A6
DEV
A5
DEV
A1
DEV
A0
07667-
043
R/W
20
30
26
19
21
25
28
27
35
29
36
D1
D0
D7
D6
REGISTER DATA[D7:D0]
S
ACK
37
P
AD7879-1/AD7889-1
DEVICE ADDRESS
DEV
A6
DEV
A5
DEV
A1
DEV
A0
R/W
20
30
P
USING
REPEATED
START
SEPARATE
READ AND
WRITE
TRANSACTIONS
ACK
t
1
t
3
t
4
t
4
t
5
t
5
t
6
t
8
t
7
Figure 44. Example of I2C Timing for Single Register Readback Operation
7-BIT DEVICE
ADDRESS
7-BIT DEVICE
ADDRESS
REGISTER ADDR
[7:0]
READ DATA
HIGH BYTE [15:8]
READ DATA
LOW BYTE [7:0]
READ DATA
HIGH BYTE [15:8]
READ DATA
LOW BYTE [7:0]
W
S
P
S
R
P
ACK
. . .
ACK
READ (WRITE TRANSACTION SETS UP REGISTER ADDRESS)
7-BIT DEVICE
ADDRESS
7-BIT DEVICE
ADDRESS
REGISTER ADDR
[7:0]
READ DATA
HIGH BYTE [15:8]
READ DATA
LOW BYTE [7:0]
READ DATA
HIGH BYTE [15:8]
READ DATA
LOW BYTE [7:0]
W
S
R
P
ACK
SR
ACK
. . .
ACK
READ (USING REPEATED START)
S
7-BIT DEVICE
ADDRESS
REGISTER ADDR
[7:0]
WRITE DATA
HIGH BYTE [15:8]
WRITE DATA
LOW BYTE [7:0]
WRITE DATA
HIGH BYTE [15:8]
WRITE DATA
LOW BYTE [7:0]
W
P
ACK
. . .
WRITE
OUTPUT FROM MASTER
OUTPUT FROM
AD7879-1/AD7889-1
S = START BIT
P = STOP BIT
SR = REPEATED START BIT
R = READ BIT
W = WRITE BIT
ACK = ACKNOWLEDGE BIT
ACK = NO ACKNOWLEDGE BIT
07667-
044
Figure 45. Example of Sequential I2C Write and Readback Operation
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