參數(shù)資料
型號(hào): EVAL-AD7795EBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 34/37頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD7795
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 16
采樣率(每秒): 470
數(shù)據(jù)接口: SPI?、QSPI?、MICROWIRE? 和 DSP
輸入范圍: ±VREF/增益
在以下條件下的電源(標(biāo)準(zhǔn)): 2.5mW @ 470SPS
工作溫度: -40°C ~ 105°C
已用 IC / 零件: AD7795
已供物品:
AD7794/AD7795
Rev. D | Page 5 of 36
Parameter1
AD7794/AD7795
Unit
Test Conditions/Comments
Normal Mode Rejection2, 6
Internal Clock
@ 50 Hz, 60 Hz
60
dB min
70 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010
@ 50 Hz
78
dB min
90 dB typ, 50 ± 1 Hz, FS[3:0] = 1001
@ 60 Hz
86
dB min
100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000
External Clock
@ 50 Hz, 60 Hz
60
dB min
70 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010
@ 50 Hz
94
dB min
100 dB typ, 50 ± 1 Hz, FS[3:0] = 1001
@ 60 Hz
90
dB min
100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000
Common-Mode Rejection
AD7794B/AD7795B
@ DC
100
dB min
AIN = 1 V/gain, with gain = 4, AMP-CM Bit = 1
@ 50 Hz, 60 Hz2
100
dB min
50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010
@ 50 Hz, 60 Hz2
100
dB min
50 ± 1 Hz, FS[3:0] = 1001; 60 ± 1 Hz, FS[3:0] = 1000
AD7794C
@ DC
97
dB min
AIN = 1 V/gain, with gain = 4, AMP-CM Bit = 1
@ 50 Hz, 60 Hz2
97
dB min
50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010
@ 50 Hz, 60 Hz2
97
dB min
50 ± 1 Hz, FS[3:0] = 1001; 60 ± 1 Hz, FS[3:0] = 1000
CHOP ENABLED or DISABLED
REFERENCE INPUT
Internal Reference
Internal Reference Initial
Accuracy
1.17 ± 0.01%
V min/max
AVDD = 4 V, TA = 25°C
Internal Reference Drift2
4
ppm/°C typ
15
ppm/°C max
Power Supply Rejection
85
dB typ
External Reference
External REFIN Voltage
2.5
V nom
REFIN = REFIN(+) REFIN()
Reference Voltage Range2
0.1
V min
AVDD
V max
When VREF = AVDD, the differential input must be
limited to 0.9 × VREF/gain if the in-amp is active
Absolute REFIN Voltage Limits2
GND 30 mV
V min
AVDD + 30 mV
V max
Average Reference Input
Current
400
nA/V typ
Average Reference Input
Current Drift
±0.03
nA/V/°C typ
Normal Mode Rejection2
Same as for analog inputs
Common-Mode Rejection
100
dB typ
Reference Detect Levels
0.3
V min
0.65
V max
NOXREF bit active if VREF < 0.3 V
EXCITATION CURRENT SOURCES
(IEXC1 and IEXC2)
Output Current
10/210/1000
μA nom
Initial Tolerance at 25°C
±5
% typ
Drift
200
ppm/°C typ
Current Matching
±0.5
% typ
Matching between IEXC1 and IEXC2, VOUT = 0 V
Drift Matching
50
ppm/°C typ
Line Regulation (AVDD)
2
%/V typ
AVDD = 5 V ± 5%
Load Regulation
0.2
%/V typ
Output Compliance
AVDD 0.65
V max
Current sources programmed to 10 μA or 210 μA
AVDD 1.1
V max
Current sources programmed to 1 mA
GND 30 mV
V min
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