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| 型號： | EVAL-AD7674CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7674 |
| 產(chǎn)品培訓(xùn)模塊： | ADC Applications ADC Architectures ADC DC/AC Performance |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 800k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 輸入范圍： | 0 ~ 5 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 126mW @ 800kSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7674 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD7674ACPZ-ND - IC ADC 18BIT SAR 5V 48LFCSP AD7674ACPZRL-ND - IC ADC 18BIT SAR 5V 48LFCSP AD7674ASTZ-ND - IC ADC 18BIT 800KSPS 48-LQFP AD7674ASTZRL-ND - IC ADC 18BIT 800KSPS 48-LQFP T/R |
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AD7674
Rev. A | Page 24 of 28
SDOUT
SCLK
D1
D0
X
D17
D16
D15
12
3
16
17
18
BUSY
INVSCLK = 0
EXT/INT = 1
RD = 0
t35
t36
t37
t31
t32
t16
t3
CS
CNVST
03083-0-043
Figure 43. Slave Serial Data Timing for Reading (Read Previous Conversion during Convert)
BUSY
AD7674
#2 (UPSTREAM)
AD7674
#1 (DOWNSTREAM)
RDC/SDIN
SDOUT
CNVST
CS
SCLK
RDC/SDIN
SDOUT
CNVST
CS
SCLK
DATA
OUT
SCLK IN
CS IN
CNVST IN
BUSY
OUT
03083-0-044
Figure 44. Two AD7674s in a Daisy-Chain Configuration
External Clock Data Read during Conversion
Figure 43 shows the detailed timing diagrams of this method.
During a conversion, while both CS and RD are low, the result
of the previous conversion can be read. The data is shifted out
MSB first with 18 clock pulses, and is valid on both the rising
and falling edge of the clock. The 18 bits have to be read before
the current conversion is complete. If that is not done,
RDERROR is pulsed high and can be used to interrupt the host
interface to prevent incomplete data reading. There is no daisy-
chain feature in this mode, and the RDC/SDIN input should
always be tied either high or low.
To reduce performance degradation due to digital activity, a fast
discontinuous clock is recommended to ensure that all bits are
read during the first half of the conversion phase. It is also
possible to begin to read the data after conversion and continue
to read the last bits even after a new conversion has been
initiated.
MICROPROCESSOR INTERFACING
The AD7674 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and for ac signal
processing applications interfacing to a digital signal processor.
The AD7674 is designed to interface either with a parallel 8-bit
or 16-bit wide interface, or with a general-purpose serial port or
I/O ports on a microcontroller. A variety of external buffers can
be used with the AD7674 to prevent digital noise from coupling
into the ADC. The following section illustrates the use of the
AD7674 with an SPI equipped DSP, the ADSP-219x.
SPI Interface (ADSP-219x)
Figure 45 shows an interface diagram between the AD7674 and
the SPI equipped ADSP-219x. To accommodate the slower
speed of the DSP, the AD7674 acts as a slave device, and data
must be read after conversion. This mode also allows the daisy-
chain feature. The convert command could be initiated in
response to an internal timer interrupt. The 18-bit output data
are read with 3-byte SPI access. The reading process could be
initiated in response to the end-of-conversion signal (BUSY
going low) using an interrupt line of the DSP. The serial
interface (SPI) on the ADSP-219x is configured for master
mode (MSTR) = 1, Clock Polarity Bit (CPOL) = 0, Clock Phase
Bit (CPHA) = 1, and SPI interrupt enable (TIMOD) = 00, by
writing to the SPI Control register (SPICLTx). It should be
noted that to meet all timing requirements, the SPI clock should
be limited to 17 Mbps, which allows it to read an ADC result in
about 1.1 μs. When a higher sampling rate is desired, use of one
of the parallel interface modes is recommended.
AD76741
ADSP-219x1
PFx
MISOx
SCKx
PFx OR TFSx
SDOUT
SCLK
CNVST
CS
RD
INVSCLK
1ADDITIONAL PINS OMITTED FOR CLARITY.
SPIxSEL (PFx)
BUSY
DVDD
MODE0/MODE1
EXT/INT
03
08
3-
04
5
Figure 45. Interfacing the AD7674 to an SPI Interface
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7674EDZ | 功能描述:BOARD EVAL FOR AD7674 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:* 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7675CB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Evaluation Board AD766X/AD767X |
| EVAL-AD7675CBZ | 功能描述:BOARD EVALUATION FOR AD7675 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7676CB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Evaluation Board AD766X/AD767X |
| EVAL-AD7676CBZ | 功能描述:BOARD EVALUATION FOR AD7676 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
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