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參數(shù)資料
| 型號： | EVAL-AD7622CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7622 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 2M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 輸入范圍： | ±VREF |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 70mW @ 2MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7622 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD7622BSTZ-ND - IC ADC 16BIT DIFFERENTIAL 48LQFP AD7622BCPZ-ND - IC ADC 16BIT DIFFERENTL 48-LFCSP AD7622BSTZRL-ND - IC ADC 16BIT DIFFERENTL 48-LQFP AD7622BCPZRL-ND - IC ADC 16BIT DIFFERENTL 48-LFCSP |
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AD7622
Rev. 0 | Page 10 of 28
Pin
No.
Mnemonic
Type1
Description
31
RD
DI
Read Data. When CS and RD are both low, the interface parallel or serial output bus is enabled.
32
CS
DI
Chip Select. When CS and RD are both low, the interface parallel or serial output bus is enabled.
CS is also used to gate the external clock in slave serial mode.
33
RESET
DI
Reset Input. When high, resets the AD7622. Current conversion, if any, is aborted. Falling edge of
RESET enables the calibration mode indicated by pulsing BUSY high. Refer to the RESET section.
If not used, this pin can be tied to DGND.
34
PD
DI
Power-Down Input. When high, power downs the ADC. Power consumption is reduced and
conversions are inhibited after the current one is completed.
35
CNVST
DI
Conversion Start. A falling edge on CNVST puts the internal sample-and-hold into the hold state
and initiates a conversion.
37
REF
AI/O
Reference Output/Input.
When PDREF/PDBUF = low, the internal reference and buffer are enabled producing 2.048 V on this pin.
When PDREF/PDBUF = high, the internal reference and buffer are disabled allowing an externally
supplied voltage reference up to AVDD volts. Decoupling is required with or without the internal
reference and buffer. Refer to the Voltage Reference Input section.
38
REFGND
AI
Reference Input Analog Ground.
39
IN
AI
Differential Negative Analog Input.
40
NC
No Connect.
43
IN+
AI
Differential Positive Analog Input.
45
TEMP
AO
Temperature Sensor Analog Output. Normally, 278 mV @ 25°C with a temperature coefficient of
1 mV/°C. This pin can be used to measure the temperature of the AD7622. See the
Temperature Sensor section.
46
REFBUFIN
AI/O
Internal Reference Output/Reference Buffer Input.
When PDREF/PDBUF = low, the internal reference and buffer are enabled producing the 1.2 V (typical)
band gap output on this pin, which needs external decoupling. The internal fixed gain reference
buffer uses this to produce 2.048 V on the REF pin.
When using an external reference with the internal reference buffer (PDBUF = low, PDREF = high),
applying 1.2 V on this pin produces 2.048 V on the REF pin. Refer to the Voltage Reference Input section.
47
PDREF
DI
Internal Reference Power-Down Input.
When low, the internal reference is enabled.
When high, the internal reference is powered down and an external reference must been used.
48
PDBUF
DI
Internal Reference Buffer Power-Down Input.
When low, the buffer is enabled (must be low when using internal reference).
When high, the buffer is powered-down.
1 AI = analog input; AI/O = bidirectional analog; AO = analog output; DI = digital input; DI/O = bidirectional digital; DO = digital output; P = power.
2 With an SCLK period ≥ (2 × t32). With an SCLK period < (2 × t32), SDOUT is valid on the next rising edge with INVSCLK = low and next falling edge with INVSCLK = high.
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