參數(shù)資料
型號(hào)： EVAL-AD7609EDZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 26/36頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR AD7609
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 8
位數(shù)： 18
采樣率（每秒）： 200k
數(shù)據(jù)接口： DSP，MICROWIRE?，并聯(lián)，QSPI?，串行，SPI?
輸入范圍： ±10 V
在以下條件下的電源（標(biāo)準(zhǔn)）： 100mW @ 200kSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD7609
已供物品： 板
AD7609
Data Sheet
Rev. A | Page 32 of 36
LAYOUT GUIDELINES
The printed circuit board that houses the AD7609 should be
designed so that the analog and digital sections are separated
and confined to different areas of the board.
Use at least one ground plane. It can be common or split
between the digital and analog sections. In the case of the split
plane, the digital and analog ground planes should be joined in
only one place, preferably as close as possible to the AD7609.
If the AD7609 is in a system where multiple devices require
analog-to-digital ground connections, the connection should
still be made at only one point, a star ground point, which
should be established as close as possible to the AD7609. Good
connections should be made to the ground plane. Avoid sharing
one connection for multiple ground pins. Individual vias or
multiple vias to the ground plane should be used for each
ground pin.
Avoid running digital lines under the devices because doing
so couples noise onto the die. Allow the analog ground plane
to run under the AD7609 to avoid noise coupling. Shield fast-
switching signals like CONVST A, CONVST B, or clocks with
digital ground to avoid radiating noise to other sections of the
board, and they should never run near analog signal paths.
Avoid crossover of digital and analog signals. Run traces on
layers in close proximity on the board at right angles to each
other to reduce the effect of feedthrough through the board.
The power supply lines to the AVCC and VDRIVE pins on the
AD7609 should use as large a trace as possible to provide low
impedance paths and reduce the effect of glitches on the power
supply lines. Where possible, use supply planes. Good connec-
tions should be made between the AD7609 supply pins and the
power tracks on the board; this should involve the use of a single
via or multiple vias for each supply pin.
Good decoupling is also important to lower the supply imped-
ance presented to the AD7609 and to reduce the magnitude of
the supply spikes. Place the decoupling capacitors close to,
ideally right up against, these pins and their corresponding
ground pins. Place the decoupling capacitors for the REFIN/
REFOUT pin and the REFCAPA and REFCAPB pins as close as
possible to their respective AD7609 pins. Where possible, they
should be placed on the same side of the board as the AD7609
device. Figure 60 shows the recommended decoupling on the
top layer of the AD7609 board. Figure 61 shows bottom layer
decoupling. Bottom layer decoupling is for the four AVCC pins
and the VDRIVE pin.
09760-
057
Figure 60. Top Layer Decoupling REFIN/REFOUT, REFCAPA, REFCAPB, and
REGCAP Pins
09760-
058
Figure 61. Bottom Layer Decoupling
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