VOUT AGNDF AGNDS NC REFF REFS
參數(shù)資料
型號: EVAL-AD5542ASDZ
廠商: Analog Devices Inc
文件頁數(shù): 24/24頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD5542
標(biāo)準包裝: 1
系列: nanoDAC™
DAC 的數(shù)量: 1
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
設(shè)置時間: 1µs
DAC 型: 電壓
已供物品:
已用 IC / 零件: AD5542
AD5512A/AD5542A
Rev. A | Page 9 of 24
NC = NO CONNECT
1
2
3
4
5
6
7
8
VOUT
AGNDF
AGNDS
NC
REFF
REFS
RFB
CS
16
15
14
13
12
11
10
9
VLOGIC
INV
DGND
DIN
SCLK
CLR
LDAC
VDD
AD5542A
TOP VIEW
(Not to Scale)
09199-
035
Figure 6. AD5542A 16-Lead TSSOP Pin Configuration
Table 8. AD5542A Pin Function Descriptions
Pin No.
Mnemonic
Description
1
R
FB
Feedback Resistor Pin. In bipolar mode, connect this pin to the external op amp output.
2
V
OUT
Analog Output Voltage from the DAC.
3
AGNDF
Ground Reference Point for Analog Circuitry (Force).
4
AGNDS
Ground Reference Point for Analog Circuitry (Sense).
5
REFS
Voltage Reference Input (Sense) for the DAC. Connect to an external 2.5 V reference. Reference can range from
2 V to V
DD.
6
REFF
Voltage Reference Input (Force) for the DAC. Connect to an external 2.5 V reference. Reference can range from
2 V to V
DD.
7
NC
No Connect.
8
CS
Logic Input Signal. The chip select signal is used to frame the serial data input.
9
SCLK
Clock Input. Data is clocked into the input register on the rising edge of SCLK. Duty cycle must be between 40%
and 60%.
10
DIN
Serial Data Input. This device accepts 16-bit words. Data is clocked into the input register on the rising edge of SCLK.
11
CLR
Asynchronous Clear Input. The CLR input is falling edge sensitive. When CLR is low, all LDAC pulses are ignored.
When CLR is activated, the DAC register is cleared to the model selectable midscale.
12
LDAC
LDAC Input. When this input is taken low, the DAC register is simultaneously updated with the contents of the
input register.
13
DGND
Digital Ground. Ground reference for digital circuitry.
14
INV
Connection to the Internal Scaling Resistors of the DAC. Connect the INV pin to the external op amps inverting
input in bipolar mode.
15
V
LOGIC
Logic Power Supply.
16
V
DD
Analog Supply Voltage, 5 V ± 10%.
相關(guān)PDF資料
PDF描述
EVAL-AD5541ASDZ BOARD EVAL FOR AD5541
PLG1C331MCO1 CAP ALUM 330UF 16V 20% RADIAL
RSM06DTKD CONN EDGECARD 12POS DIP .156 SLD
REF196GSZ-REEL7 IC VREF SERIES PREC 3.3V 8-SOIC
ECE-V1VA330P CAP ALUM 33UF 35V 20% SMD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-AD5543SDZ 功能描述:BOARD EVAL FOR AD5543 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率(每秒):- 數(shù)據(jù)接口:串行,SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5544SDZ 功能描述:BOARD EVAL FOR AD5544 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率(每秒):- 數(shù)據(jù)接口:串行,SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5545SDZ 功能描述:BOARD EVAL FOR AD5545 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率(每秒):- 數(shù)據(jù)接口:串行,SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5546SDZ 功能描述:BOARD EVAL FOR AD5546 RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率(每秒):- 數(shù)據(jù)接口:串行,SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
EVAL-AD5551/52EB 制造商:Analog Devices 功能描述:EVAL KIT FOR AD5551 5 V, SERL-INPUT VOLT-OUTPUT, 14BIT DACS - Bulk