- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16568 > EVAL-AD5522EBUZ (Analog Devices Inc)BOARD EVAL FOR 12X12MM AD5522 PDF資料下載
參數(shù)資料
| 型號(hào)： | EVAL-AD5522EBUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 32/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR 12X12MM AD5522 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 測試與測量，參數(shù)測量單元（PMU） |
| 已用 IC / 零件： | AD5522 |
| 已供物品： | 板 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當(dāng)前第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
AD5522
Data Sheet
Rev. E | Page 38 of 64
Table 14. References Suggested For Use with AD55221
Part No.
Voltage (V)
Initial
Accuracy %
Ref Out
TC (ppm/°C)
Ref Output
Current (mA)
SupplyVoltage
Range (V)
Package
ADR435
5
±0.04
1
30
+7 to +18
MSOP, SOIC
ADR445
5
±0.04
1
10
+5.5 to +18
MSOP, SOIC
ADR431
2.5
±0.04
1
30
+4.5 to +18
MSOP, SOIC
ADR441
2.5
±0.04
1
10
+3 to +18
MSOP, SOIC
1
Subset of the possible references suitable for use with the AD5522. Visit www.analog.com for more options.
For other voltage and current ranges, the required reference
level can be calculated as follows:
1. Identify the nominal range required.
2. Identify the maximum offset span and the maximum gain
required on the full output signal range.
3. Calculate the new maximum output range, including the
expected maximum gain and offset errors.
4. Choose the new required VOUTMAX and VOUTMIN, keeping
the VOUT limits centered on the nominal values. Note that
AVDD and AVSS must provide sufficient headroom.
5. Calculate the value of VREF as follows:
VREF = (VOUTMAX VOUTMIN)/4.5
Reference Selection Example
If, given the following conditions:
Nominal output range = 10 V (2 V to +8 V)
Offset error = ±100 mV
Gain error = ±0.5%
REFGND = AGND = 0 V
Then, with gain error = ±0.5%, the maximum positive gain
error = +0.5%, and the output range including gain error =
10 V + 0.005(10 V) = 10.05 V.
With offset error = ±100 mV, the maximum offset error span =
2(100 mV) = 0.2 V, and the output range including gain error
and offset error = 10.05 V + 0.2 V = 10.25 V.
To calculate VREF with actual output range = 10.25 V, that is,
2.125 V to +8.125 V (centered),
VREF = (8.125 V + 2.125 V)/4.5 = 2.28 V
If the solution yields an inconvenient reference level, the user
can adopt one of the following approaches:
Use a resistor divider to divide down a convenient, higher
reference level to the required level.
Select a convenient reference level above VREF and modify
the gain and offset registers to digitally downsize the reference.
In this way, the user can use almost any convenient refer-
ence level.
Use a combination of these two approaches.
In this case, the optimum reference is a 2.5 V reference; the user
can use the M and C registers and the offset DAC to achieve the
required 2 V to +8 V range. Change the ISENSE amplifier gain to
5 to ensure a full-scale current range of the specified values (see
the Current Range Selection section). This gain also allows opti-
mization of power supplies and minimizes power consumption
within the device.
It is important to bear in mind when choosing a reference value
that values other than 5 V (MI gain = 10) and 2.5 V (MI gain = 5)
result in current ranges other than those specified. See the
Measure Current Gains section for more details.
CALIBRATION
Calibration involves determining the gain and offset of each
channel in each mode and overwriting the default values in the
M and C registers of the individual DACs. In some cases (for
example, FI mode), the calibration constants, particularly those
for gains, may be range dependent.
Reducing Zero-Scale Error
Zero-scale error can be reduced as follows:
1. Set the output to the lowest possible value.
2. Measure the actual output voltage and compare it to the
required value. This gives the zero-scale error.
3. Calculate the number of LSBs equivalent to the zero-scale
error and add/subtract this number to the default value of
the C register.
Reducing Gain Error
Gain error can be reduced as follows:
1. Measure the zero-scale error.
2. Set the output to the highest possible value.
3. Measure the actual output voltage and compare it to the
required value. This is the gain error.
4. Calculate the number of LSBs equivalent to the gain error
and subtract this number from the default value of the M
register. Note that only positive gain error can be reduced.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX8664BEEP+T | IC CNTRLR DUAL OUT 20-QSOP |
| SCRH8D28-100 | INDUCTOR SMD 10UH 2.30A 100KHZ |
| MAX16948AGTE/V+T | IC LDO/SWITCH ADJ DUAL 16TQFN |
| VI-JW2-EZ-S | CONVERTER MOD DC/DC 15V 25W |
| VI-JW1-EZ-S | CONVERTER MOD DC/DC 12V 25W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD5532EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel Infinite Sample-and-Hold |
| EVAL-AD5532EBZ | 功能描述:BOARD EVAL FOR AD5532 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5532HSEBZ | 功能描述:BOARD EVAL FOR AD5532HS RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| EVAL-AD5533EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel Precision Infinite Sample-and-Hold |
| EVAL-AD5535BEBZ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。