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| 型號： | EVAL-AD5160EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL AD5160 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 數(shù)字電位器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD5160 |
| 主要屬性： | 1 通道，256 位置 |
| 次要屬性： | SPI 接口 |
| 已供物品： | 板 |
AD5160
Rev. B | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 kΩ VERSION
VDD = 5 V ± 10%, or 3 V ± 10%; VA = +VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ1
Max
Unit
DC CHARACTERISTICS
Rheostat Mode
Resistor Differential Nonlinearity2
R-DNL
RWB, VA = no connect
1.5
±0.1
+1.5
LSB
Resistor Integral Nonlinearity2
R-INL
RWB, VA = no connect
4
±0.75
+4
LSB
Nominal Resistor Tolerance3
RAB
TA = 25°C
20
+20
%
Resistance Temperature Coefficient
RAB/T
VAB = VDD, wiper = no connect
45
ppm/°C
Wiper Resistance
RW
50
120
Ω
Potentiometer Divider Mode
Specifications apply to all VRs
Resolution
N
8
Bits
Differential Nonlinearity4
DNL
1.5
±0.1
+1.5
LSB
Integral Nonlinearity4
INL
1.5
±0.6
+1.5
LSB
Voltage Divider Temperature Coefficient
VW/T
Code = 0x80
15
ppm/°C
Full-Scale Error
VWFSE
Code = 0xFF
6
2.5
0
LSB
Zero-Scale Error
VWZSE
Code = 0x00
0
+2
+6
LSB
RESISTOR TERMINALS
Voltage Range5
VA, VB, VW
GND
VDD
V
CA,B
f = 1 MHz, measured to GND, code = 0x80
45
pF
Capacitance W6
CW
f = 1 MHz, measured to GND, code = 0x80
60
pF
Common-Mode Leakage
ICM
VA = VB = VDD/2
1
nA
DIGITAL INPUTS
Input Logic High
VIH
2.4
V
Input Logic Low
VIL
0.8
V
Input Logic High
VIH
VDD = 3 V
2.1
V
Input Logic Low
VIL
VDD = 3 V
0.6
V
Input Current
IIL
VIN = 0 V or 5 V
±1
μA
Input Capacitance6
CIL
5
pF
POWER SUPPLIES
Power Supply Range
VDD RANGE
2.7
5.5
V
Supply Current
IDD
VIH = 5 V or VIL = 0 V
3
8
μA
Power Dissipation7
PDISS
VIH = 5 V or VIL = 0 V, VDD = 5 V
0.2
mW
Power Supply Sensitivity
PSS
VDD = +5 V ± 10%, code = midscale
±0.02
±0.05
%/%
DYNAMIC CHARACTERISTICS6, 8
Bandwidth –3 dB
BW_5K
RAB = 5 kΩ, code = 0x80
1.2
MHz
Total Harmonic Distortion
THDW
VA = 1 V rms, VB = 0 V, f = 1 kHz
0.05
%
VW Settling Time
tS
VA = 5 V, VB = 0 V, ±1 LSB error band
1
μs
Resistor Noise Voltage Density
eN_WB
RWB = 2.5 kΩ
6
nV/√Hz
1 Typical specifications represent average readings at +25°C and VDD = 5 V.
2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3 VAB = VDD, wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output digital-to-analog converter (DAC). VA = VDD and VB =
0 V. DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.
5 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 PDISS is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
8 All dynamic characteristics use VDD = 5 V.
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