參數(shù)資料
型號(hào)： EV-ADF4156SD1Z
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/24頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADF4156
標(biāo)準(zhǔn)包裝： 1
主要目的： 計(jì)時(shí)，頻率合成器
嵌入式： 否
已用 IC / 零件： ADF4156
主要屬性： 單路分?jǐn)?shù)-N PLL
次要屬性： 6.2GHz
已供物品： 板，CD
6.2 GHz Fractional-N Frequency Synthesizer
Data Sheet
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
2006–2013 Analog Devices, Inc. All rights reserved.
FEATURES
RF bandwidth to 6.2 GHz
2.7 V to 3.3 V power supply
Separate VP pin allows extended tuning voltage
Programmable fractional modulus
Programmable charge-pump currents
3-wire serial interface
Digital lock detect
Power-down mode
ADF4106, ADF4153, and ADF4154 frequency synthesizers
Programmable RF output phase
Loop filter design possible with ADIsimPLL
Cycle slip reduction for faster lock times
APPLICATIONS
CATV equipment
Base stations for mobile radio (WiMAX, GSM, PCS, DCS,
SuperCell 3G, CDMA, WCDMA)
Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
Wireless LANs, PMR
Communications test equipment
GENERAL DESCRIPTION
The ADF4156 is a 6.2 GHz fractional-N frequency synthesizer
that implements local oscillators in the upconversion and down-
conversion sections of wireless receivers and transmitters. It
consists of a low noise digital phase frequency detector (PFD), a
precision charge pump, and a programmable reference divider.
There is a Σ-Δ based fractional interpolator to allow programmable
fractional-N division. The INT, FRAC, and MOD registers define
an overall N divider (N = (INT + (FRAC/MOD))). The RF output
phase is programmable for applications that require a particular
phase relationship between the output and the reference. The
ADF4156 also features cycle slip reduction circuitry, leading
to faster lock times without the need for modifications to the
loop filter.
Control of all on-chip registers is via a simple 3-wire interface.
The device operates with a power supply ranging from 2.7 V to
3.3 V and can be powered down when not in use.
FUNCTIONAL BLOCK DIAGRAM
LOCK
DETECT
N-COUNTER
CP
RFCP3 RFCP2
RFCP4
RFCP1
REFERENCE
DATA
LE
32-BIT
DATA
REGISTER
CLOCK
REFIN
AVDD
AGND
VDD
DGND
RDIV
SDOUT
NDIV
DGND
CPGND
DVDD VP
CE
RSET
RFINA
RFINB
OUTPUT
MUX
MUXOUT
–
+
HIGH Z
PHASE
FREQUENCY
DETECTOR
ADF4156
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
MODULUS
REG
FRACTION
REG
INTEGER
REG
CURRENT
SETTING
×2
DOUBLER
5-BIT
R-COUNTER
CHARGE
PUMP
05863-
001
CSR
/2
DIVIDER
Figure 1.
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EV-ADF4157SD1Z 功能描述:BOARD EVAL FOR ADF4157 RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081
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EV-ADF4159EB2Z 制造商:Analog Devices 功能描述:13GHZFRAC-NPLL+ADF55XXVCO+3VADM - Boxed Product (Development Kits)
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