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    參數(shù)資料
    型號(hào): ES2660-7EPD2B2
    廠商: POWER-ONE INC
    元件分類: 電源模塊
    英文描述: 2-OUTPUT 100 W DC-DC REG PWR SUPPLY MODULE
    封裝: METAL, CASE S02, MODULE
    文件頁(yè)數(shù): 4/33頁(yè)
    文件大?。?/td> 438K
    代理商: ES2660-7EPD2B2
    S Series Data Sheet
    100 Watt AC-DC and DC-DC Converters
    APR 26, 2006 revised to SEP 25, 2006
    Page 12 of 33
    www.power-one.com
    Fig. 15
    Typical output response as a function of inhibit control
    Table 5: Inhibit characteristics
    Characteristic
    Conditions
    min
    typ
    max Unit
    Vinh Inhibit Vo = on Vi min - Vi max –50
    0.8
    V
    voltage
    Vo = off
    2.4
    50
    Iinh Inhibit current
    Vinh = 0
    –400
    A
    tr
    Rise time
    30
    ms
    tf
    Fall time
    depending on
    Io
    0
    t
    0
    Inhibit
    1
    0.1
    1
    Vo/Vo nom
    tr
    tf
    06001
    Sense Lines
    (Only single output models)
    Important: Sense lines must always be connected! Incorrectly
    connected sense lines may activate the overvoltage limitation,
    resulting in a permanent short-circuit of the output.
    This feature allows for compensation of voltage drops across the
    connector contacts and if necessary, across the load lines. If the
    sense lines are connected at the load rather than directly at the
    connector, the user should ensure that the voltage differences
    specified in the table below are not exceeded. We recommend
    connecting the sense lines directly at the female connector.
    To ensure correct operation, both sense lines (S+ and S–) should
    be connected to their respective power outputs (Vo1+ and Vo1–)
    and the voltage difference between any sense line and its
    respective power output pin (as measured on the connector)
    should not exceed the following values:
    Table 6: Maximum voltage compensation allowed using
    sense lines
    Output
    Total voltage difference
    Voltage difference
    voltage
    between sense lines and
    between
    their respective outputs
    Vo– and S–
    5.1 V
    < 0.5 V
    < 0.25 V
    12, 15, 24 V
    < 1.0 V
    < 0.25 V
    If the output voltages are increased above Vo nom via the R-input
    control, option P setting, remote sensing or option T, the output
    currents must be reduced accordingly so that Po nom is not
    exceeded.
    Auxiliary Functions
    i Inhibit for Remote On and Off
    Note: With open i input the output is disabled.
    The outputs may be enabled or disabled by means of a logic
    signal (TTL, CMOS, etc.) applied between the inhibit input i and
    the negative pin of output 1 (Vo1–). In systems with several
    converters, this feature can be used to control the activation
    sequence of the converters. If the inhibit function is not required,
    connect the inhibit pin 18 to pin 14 to enable the outputs (active
    low logic, fail safe).
    Vi+
    Vi–
    Vo–
    i
    Vo+
    Iinh
    Vinh
    06031
    1.6
    0.8
    0
    –0.8
    –50
    Vinh [V]
    Iinh [mA]
    –30
    0
    –10
    10
    30
    50
    2.0
    1.2
    0.4
    –0.4
    Vinh = 0.8 V
    Vo = on
    Vo = off
    Vinh = 2.4 V
    06032
    Fig. 13
    Definition of Vinh and Iinh.
    Fig. 14
    Typical inhibit current Iinh versus inhibit voltage Vinh
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