參數(shù)資料
型號: ES1988S
廠商: Electronic Theatre Controls, Inc.
英文描述: PCI Audio-Modem Accelerator Product Brief
中文描述: PCI音頻,調(diào)制解調(diào)器加速器產(chǎn)品簡介
文件頁數(shù): 5/6頁
文件大?。?/td> 54K
代理商: ES1988S
ESS Technology, Inc.
SAM0368-030601
5
ES1988 PRODUCT BRIEF
SDI2
56
I
External AC-link serial data input. Select secondary codec by enabling Allegro_Base+38h [5] =
1.
GPIO8
I/O
General-purpose input/output.
OSCI
57
I
49.152-MHz crystal input.
OSCO
58
O
49.152-MHz crystal output.
SRESET2#
59
O
Reset output for AC-Link interface. Select secondary codec by enabling Allegro_Base+38h [5] =
1.
GPIO3
I/O
General-purpose input/output.
SDFS2
60
O
Serial data frame sync output for AC-Link interface. Select secondary codec by enabling
Allegro_Base+38h [5] = 1.
GPIO9
I/O
General-purpose input/output.
(note)
If a pull-down resistor is used on this pin, the ES1988 is configured as a multifunction device
(audio-modem). Otherwise, the ES1988 is configured as a single function audio-only device.
SCLK2
61
O
Serial clock for AC-link interface. Select secondary codec by enabling Allegro_Base+38h [5] = 1.
GPIO10
I/O
General-purpose input/output.
SDO2
62
O
External AC-link serial data output. Select secondary codec by enabling Allegro_Base+38h [5] =
1.
GPIO11
I/O
General-purpose input/output.
VAUXD
I
V
AUX
detect. During the reset period, the V
AUXD
pin is driven high to indicate ACPI support in the
D3
cold
state, and is driven low to indicate ACPI is not supported in the
D3
cold
state. If V
AUX
is not
supported, then V
AUX
(pin 55) should be connected to VCC and V
AUXD
(pin 62) should be pulled
down.
PCGNT#
63
I
PC/PCI grant input. Enable PC/PCI by setting PCI 50h [10:8] = 010. Select PCGNT# from pin 63
by setting Allegro_Base+58h [6] = 0. Either pin 54 or pin 63 may be used for PCGNT#.
GT0#
O
Grant to PCI master. GTO# is enabled by setting PCIx2 arbiter bits PCI 58h [0] = 1 and PCI 58h
[11] = 1. Select GT0#/GSO from pin 63 by enabling PCI 58h [10] = 1. Pin 51 may also be used as
GT0#/GSO.
GS0
O
Grant select 0 output to control external quick switch to grant PCI master phase. GSO is enabled
by setting PCIx2 arbiter bit PCI 58h [0] = 1 and PCI 58h [11] = 0. Select GS0/GT0# from pin 63
by enabling PCI 58h [10] = 1. Pin 51 may also be used as GT0#/GSO.
GPIO12
I/O
General-purpose input/output.
PC_BEEP
64
I
PC Speaker input.
PHONE
65
I
Mono input.
CD_L
66
I
CD-audio left channel input.
CD_GND
67
I
CD-audio ground input.
CD_R
68
I
CD-audio right channel input.
MIC
69
I
Microphone input.
LINE_IN_L
70
I
Line left channel input.
LINE_IN_R
71
I
Line right channel input.
AVDD[2:1]
83, 72
I
Analog supply voltage, 5V.
AVSS[2:1]
82, 73
I
Analog ground.
VREF
74
O
Reference voltage.
Table 1 ES1988 Pin Descriptions (Continued)
Names
Pin Numbers
I/O
Descriptions
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