
ESS Technology, Inc.
SAM0113-030601
3
ES1869 PRODUCT BRIEF
Names
Pin Numbers
I/O
Descriptions
T(A-D)
27:30
I/O
Joystick timer pins. These pins connect to the X-Y positioning variable resistors for the two joysticks.
SW(A-D)
31:34
I
Active-low, joystick switch setting inputs. These SW pins have an internal pull-up resistor.
AUXB_L,
AUXB_R
35, 36
I
Auxiliary inputs, left and right. AUXB_L and AUXB_R have internal pull-up resistors to CMR.
AUXA_L,
AUXA_R
37, 38
I
Auxiliary inputs, left and right. AUXA_L and AUXA_R have internal pull-up resistors to CMR. Normally
intended for connection to an internal or external CD-ROM analog output.
CMR
39
O
Common mode reference voltage (2.25 ± 5%). This pin should be bypassed to analog ground with a
47-
μ
F electrolytic capacitor with a 0.1-
μ
F capacitor in parallel.
MIC
40
I
Microphone input. MIC has an internal pull-up resistor to CMR.
GNDA
41
I
Analog ground.
CAP3D
42
I
Bypass capacitor to analog ground for 3D effect.
VDDA
43
I
Analog supply voltage (4.5 to 5.5V). Should be greater than or equal to VDDD –0.3V.
FOUT_L,
FOUT_R
44, 45
O
Filter outputs, left and right. AC-coupled externally to CIN_L and CIN_R to remove DC offsets. These
outputs have internal series resistors of about 5k ohms. Capacitors to analog ground on these pins can
be used to create a low-pass filter pole that removes switching noise introduced by the switched-
capacitor filters.
CIN_L, CIN_R
46, 47
I
Capacitive coupled inputs, left and right. These inputs have internal pull-up resistors to CMR of
approximately 50k ohms.
LINE_L, LINE_R
48, 49
I
Line inputs, left and right. LINE_L and LINE_R have internal pull-up resistors to CMR.
AOUT_L,
AOUT_R
50, 51
O
Line-level stereo outputs, left and right. Can drive a 10k ohm load.
MMIEB
0
52
I
Modem interrupt enable active-low input. Generated from the modem UART.
PCSKPO
1
O
PC speaker analog output.
MMIRQ
0
53
I
Modem interrupt request active-high input.
PCSPKI
1
I
Normally low digital PC speaker input. This signal is converted to an analog signal with volume control
and appears on analog output PCSPKO.
IISLR
1
55
I
Left/right strobe for I
2
S interface. This pin has a pull-down.
MMCSB
0
O
Output from ES1869 for the modem CSB.
GPCS
56
O
If selected by the PnP logic, pin 56 becomes an active-high chip select for external general-purpose
device.
GPO0
O
The GPO0 output that is set low by external reset and thereafter programmable by system software for
power management or other applications
MSO
58
O
MIDI serial data output.
MSI
59
I
MIDI serial input. Schmitt trigger input with internal pull-up resistor.
MODE
60
I
Mode function pin. Connect to either GNDD or VDDD to select the function of the groups of multiple
function pins set apart below.
DRQD
0
61
O
Tri-state output. Optional 16-bit DMA request for IDE interface.
IISDATA
1
I
Serial data for I
2
S interface. This pin has a pull-down.
DACKBD
0
62
I
Optional 16-bit DMA acknowledge for IDE interface.
IISCLK
1
I
Serial shift clock for I
2
S interface. This pin has a pull-down.
DRQ(A-C)
63, 65, 75
O
Three (A,B,C) active-high DMA requests to the ISA bus. Unselected DRQ outputs are high impedance.
When DMA is not active, the selected DRQ output has a pull-down device that holds the DRQ line
inactive unless another device that shares the same DRQ line can source enough current to make the
DRQ line active. DRQs are software configurable.
DACKB(A-C)
64, 66, 68
I
Three (A, B, C) active-low DMA acknowledge inputs.
IRQ(A-F)
69:74
O
Six (A, B, C, D, E, F) active-high interrupt requests to the ISA bus. Unselected IRQ outputs are high
impedance. IRQs are software configurable.
IORB
75
I
Active-low read strobe from the ISA bus.
IOWB
76
I
Active-low write strobe from the ISA bus.
XI
78
I
Crystal oscillator input. Connect to external 14.318-MHz crystal or clock source with CMOS levels.
XO
79
O
Crystal oscillator output. Connect to external 14.318-MHz crystal.
Table 1 ES1869 Pin Descriptions (Continued)