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參數(shù)資料

Altera Corporation

MAX 9000 Programmable Logic Device Family Data Sheet

Figure 9. MAX 9000 Column-to-IOC Connections

Dedicated Inputs

In addition to the general-purpose I/O pins, MAX 9000 devices have four

dedicated input pins. These dedicated inputs provide low-skew, device-

wide signal distribution to the LABs and IOCs in the device, and are

typically used for global clock, clear, and output enable control signals.

The global control signals can feed the macrocell or IOC clock and clear

inputs, as well as the IOC output enable. The dedicated inputs can also be

used as general-purpose data inputs because they can feed the row

FastTrack Interconnect (see Figure 2 on page 7).

I/O Cells

Figure 10 shows the IOC block diagram. Signals enter the MAX 9000

device from either the I/O pins that provide general-purpose input

capability or from the four dedicated inputs. The IOCs are located at the

ends of the row and column interconnect channels.

Each IOC is driven by

a 17-to-1 multiplexer.

Each IOC can drive up

to two column

channels.

Column FastTrack

Interconnect

IOC10

IOC1

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EPM9400RI240-20	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:
EPM9480	制造商:ALTERA 制造商全稱(chēng):Altera Corporation 功能描述:Programmable Logic Device Family
EPM9480RC20815	制造商:ALTERA 功能描述:NEW
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EPM9480RC208-20	制造商:Altera Corporation 功能描述:IC CPLD 480MC 20NS 208RQFP 制造商:Altera Corporation 功能描述:IC MAX 208RQFP

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