Notes to tables: (1) See the Operating Requirements for Altera Devices " />
參數(shù)資料
型號(hào): EPM7512BFC256-5
廠商: Altera
文件頁(yè)數(shù): 25/66頁(yè)
文件大?。?/td> 0K
描述: IC MAX 7000 CPLD 512 256-FBGA
標(biāo)準(zhǔn)包裝: 90
系列: MAX® 7000B
可編程類(lèi)型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 5.5ns
電壓電源 - 內(nèi)部: 2.375 V ~ 2.625 V
邏輯元件/邏輯塊數(shù)目: 32
宏單元數(shù): 512
門(mén)數(shù): 10000
輸入/輸出數(shù): 212
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-FBGA(17x17)
包裝: 托盤(pán)
其它名稱(chēng): 544-2361
Altera Corporation
31
MAX 7000B Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 4.6 V
for input currents less than 100 mA and periods shorter than 20 ns.
(3)
All pins, including dedicated inputs, I/O pins, and JTAG pins, may be driven before VCCINT and VCCIO are
powered.
(4)
These values are specified under the Recommended Operating Conditions in Table 15 on page 29.
(5)
The parameter is measured with 50% of the outputs each sourcing the specified current. The IOH parameter refers
to high-level TTL or CMOS output current.
(6)
The parameter is measured with 50% of the outputs each sinking the specified current. The IOL parameter refers to
low-level TTL or CMOS output current.
(7)
This value is specified for normal device operation. During power-up, the maximum leakage current is ±300 μA.
(8)
This pull-up exists while devices are being programmed in-system and in unprogrammed devices during
power-up. The pull-up resistor is from the pins to VCCIO.
(9)
Capacitance is measured at 25° C and is sample-tested only. Two of the dedicated input pins (OE1 and GCLRN) have
a maximum capacitance of 15 pF.
(10) The POR time for all 7000B devices does not exceed 100 μs. The sufficient VCCINT voltage level for POR is 2.375 V.
The device is fully initialized within the POR time after VCCINT reaches the sufficient POR voltage level.
(11) These devices support in-system programming for –40° to 100° C. For in-system programming support between
–40° and 0° C, contact Altera Applications.
Table 17. MAX 7000B Device Capacitance
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input pin capacitance
VIN = 0 V, f = 1.0 MHz
8pF
CI/O
I/O pin capacitance
VOUT = 0 V, f = 1.0 MHz
8pF
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EPM7512BFC256-7 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BFC256-7N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 512 Macro 212 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7512BFI256-10 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:
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