Notes to tables: (1) These values are specified under the recommende" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� EPM7064STC44-5F
寤犲晢锛� Altera
鏂囦欢闋佹暩(sh霉)锛� 49/66闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC MAX 7000 CPLD 64 44-TQFP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 160
绯诲垪锛� MAX® 7000
鍙法绋嬮鍨嬶細 绯荤当(t菕ng)鍏�(n猫i)鍙法绋�
鏈€澶у欢閬叉檪闁� tpd(1)锛� 5.0ns
闆诲闆绘簮 - 鍏�(n猫i)閮細 4.75 V ~ 5.25 V
閭忚集鍏冧欢/閭忚集濉婃暩(sh霉)鐩細 4
瀹忓柈鍏冩暩(sh霉)锛� 64
闁€鏁�(sh霉)锛� 1250
杓稿叆/杓稿嚭鏁�(sh霉)锛� 36
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 44-TQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 44-TQFP锛�10x10锛�
鍖呰锛� 鎵樼洡
Altera Corporation
53
MAX 7000 Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
These values are specified under the recommended operating conditions shown in Table 14. See Figure 13 for more
information on switching waveforms.
(2)
This minimum pulse width for preset and clear applies for both global clear and array controls. The tLPA parameter
must be added to this minimum width if the clear or reset signal incorporates the tLAD parameter into the signal
path.
(3)
This parameter is a guideline that is sample-tested only and is based on extensive device characterization. This
parameter applies for both global and array clocking.
(4)
These parameters are measured with a 16-bit loadable, enabled, up/down counter programmed into each LAB.
(5)
The fMAX values represent the highest frequency for pipelined data.
(6)
Operating conditions: VCCIO = 3.3 V 卤 10% for commercial and industrial use.
(7)
For EPM7064S-5, EPM7064S-6, EPM7128S-6, EPM7160S-6, EPM7160S-7, EPM7192S-7, and EPM7256S-7 devices,
these values are specified for a PIA fan-out of one LAB (16 macrocells). For each additional LAB fan-out in these
devices, add an additional 0.1 ns to the PIA timing value.
(8)
The tLPA parameter must be added to the tLAD, tLAC, tIC, tEN, tSEXP, tACL, and tCPPW parameters for macrocells
running in the low-power mode.
Power
Consumption
Supply power (P) versus frequency (fMAX in MHz) for MAX 7000 devices
is calculated with the following equation:
P = PINT + PIO = ICCINT 脳 VCC + PIO
The PIO value, which depends on the device output load characteristics
and switching frequency, can be calculated using the guidelines given in
The ICCINT value, which depends on the switching frequency and the
application logic, is calculated with the following equation:
ICCINT =
A 脳 MCTON + B 脳 (MCDEV 鈥� MCTON) + C 脳 MCUSED 脳 fMAX 脳 togLC
The parameters in this equation are shown below:
MCTON
= Number of macrocells with the Turbo Bit option turned on,
as reported in the MAX+PLUS II Report File (.rpt)
MCDEV
= Number of macrocells in the device
MCUSED = Total number of macrocells in the design, as reported
in the MAX+PLUS II Report File (.rpt)
fMAX
= Highest clock frequency to the device
togLC
= Average ratio of logic cells toggling at each clock
(typically 0.125)
A, B, C
= Constants, shown in Table 39
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
AGM30DRSH CONN EDGECARD 60POS DIP .156 SLD
NCP1013AP065 IC OFFLINE SWIT SMPS CM OVP 8DIP
TPSB107M004R0250 CAP TANT 100UF 4V 20% 1210
AYM30DRSD CONN EDGECARD 60POS DIP .156 SLD
AMC31DRTF-S13 CONN EDGECARD 62POS .100 EXTEND
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