
Altera Corporation
59
MAX 7000 Programmable Logic Device Family Data Sheet
Figures 16 through
22 show the package pin-out diagrams for MAX 7000
devices.
Figure 16. 44-Pin Package Pin-Out Diagram
Package outlines not drawn to scale.
Notes:
(1)
The pin functions shown in parenthesis are only available in MAX 7000E and MAX 7000S devices.
(2)
JTAG ports are available in MAX 7000S devices only.
44-Pin PLCC
I/O
VCC
INPUT/OE2/(GCLK2)
(1)
INPUT/GCLRn
INPUT/OE1
INPUT/GCLK1
GND
I/O
I/O/(TDO) (2)
I/O
VCC
I/O
I/O/(TCK) (2)
I/O
GND
I/O
GND
VCC
I/O
6
5 4
3
2
1 44 43 42 41 40
18 19 20 21 22 23 24 25 26 27 28
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
EPM7032
EPM7032S
EPM7064
EPM7064S
(2) I/O /(TDI)
I/O
GND
I/O
(2) I/O/(TMS)
I/O
VCC
I/O
44-Pin PQFP
Pin 12
Pin 23
Pin 34
Pin 1
I/O
VCC
INPUT/OE2/(GCLK2)
(1)
INPUT/GCLRn
INPUT/OE1
INPUT//GCLK1
GND
I/O
I/O/(TDO) (2)
I/O
VCC
I/O
I/O/(TCK) (2)
I/O
GND
I/O
GND
VCC
I/O
GND
I/O
(2) I/O/(TMS)
I/O
VCC
I/O
EPM7032
44-Pin TQFP
Pin 12
Pin 23
Pin 34
Pin 1
I/O
VCC
INPUT/OE2/(GCLK2)
(1)
INPUT/GCLRn
INPUT/OE1
INPUT/GCLK1
GND
I/O
I/O/(TDO) (2)
I/O
VCC
I/O
I/O/(TCK)
(2)
I/O
GND
I/O
GND
VCC
I/O
(2) I/O /(TDI)
I/O
GND
I/O
(2) I/O /(TMS)
I/O
VCC
I/O
EPM7032
EPM7032S
EPM7064
EPM7064S
(2) I/O/(TDI)