參數(shù)資料
型號: EPF8452ALC84-4
廠商: Altera
文件頁數(shù): 8/62頁
文件大?。?/td> 0K
描述: IC FLEX 8000A FPGA 4K 84-PLCC
產(chǎn)品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 75
系列: FLEX 8000
LAB/CLB數(shù): 42
邏輯元件/單元數(shù): 336
輸入/輸出數(shù): 68
門數(shù): 4000
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 84-LCC(J 形引線)
供應商設備封裝: 84-PLCC(29.31x29.31)
產(chǎn)品目錄頁面: 602 (CN2011-ZH PDF)
其它名稱: 544-2257-5
16
Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
FastTrack Interconnect
In the FLEX 8000 architecture, connections between LEs and device I/O
pins are provided by the FastTrack Interconnect, a series of continuous
horizontal (row) and vertical (column) routing channels that traverse the
entire FLEX 8000 device. This device-wide routing structure provides
predictable performance even in complex designs. In contrast, the
segmented routing structure in FPGAs requires switch matrices to
connect a variable number of routing paths, which increases the delays
between logic resources and reduces performance.
The LABs within FLEX 8000 devices are arranged into a matrix of
columns and rows. Each row of LABs has a dedicated row interconnect
that routes signals both into and out of the LABs in the row. The row
interconnect can then drive I/O pins or feed other LABs in the device.
Figure 8 shows how an LE drives the row and column interconnect.
Figure 8. FLEX 8000 LAB Connections to Row & Column Interconnect
LE1
LE2
Row Channels
16 Column
Channels
Each LE drives up to
two column channels.
to Local
Feedback
to Local
Feedback
Each LE drives one
row channel.
(1)
Note:
(1)
See Table 4 for the number of row channels.
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相關代理商/技術(shù)參數(shù)
參數(shù)描述
EPF8452ALC844N 制造商:Altera Corporation 功能描述:FPGA FLEX 8000 Family 4K Gates 336 Cells 125MHz CMOS Technology 5V 84-Pin PLCC 制造商:Altera 功能描述:FPGA FLEX 8000 Family 4K Gates 336 Cells 125MHz CMOS Technology 5V 84-Pin PLCC
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EPF8452ALI84-3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
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